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SC4503

1.3MHz Step-Up Switching Regulator with 1.4A Switch

Semtech Corporation 

SC4503

POWER MANAGEMENT

Applications Information

Operation

The SC4503 is a 1.3MHz peak current-mode step-up

switching regulator with an integrated 1.4A (minimum)

power transistor. Referring to the block diagram, Figure

2, the clock CLK resets the latch and blanks the power

transistor Q3 conduction. Q3 is switched on at the trailing

edge of the clock.

clamped by D1 and Q1, follows the voltage at the SHDN SS

pin. The input inductor current, which is in turn controlled

by the error amplifier output, also ramps up gradually.

Soft-starting the SC4503 in this manner eliminates high

input current and output overshoot. Under fault condition

(VIN < 2.2V or over-temperature), the soft-start capacitor is

discharged to 1V. When the fault condition disappears, the

converter again undergoes soft-start.

Switch current is sensed with an integrated sense resistor.

The sensed current is summed with the slope-compensat-

ing ramp and fed into the modulating ramp input of the

PWM comparator. The latch is set and Q3 conduction is

terminated when the modulating ramp intersects the error

amplifier (EA) output. If the switch current exceeds 1.9A (the

typical current-limit), then the current-limit comparator ILIM

will set the latch and turn off Q . Due to separate pulse-

3

width modulating and current limiting paths, cycle-by-cycle

current limiting is not affected by slope compensation.

Setting the Output Voltage

An external resistive divider R1 and R2 with its center tap

tied to the FB pin (Figure 3) sets the output voltage.

5

=

5

¨©§

9287

9

− ¸¹·

(1)

VOUT

The current-mode switching regulator is a dual-loop feed-

back control system. In the inner current loop the EA output

controls the peak inductor current. In the outer loop, the

error amplifier regulates the output voltage. The double

reactive poles of the output LC filter are reduced to a single

real pole by the inner current loop, allowing the internal loop

compensation network to accommodate a wide range of

input and output voltages.

R1

25nA

SC4503

3 FB

R2

Figure 3. R1- R2 Divider Sets the Output Voltage

Applying 0.9V at the SHDN SS pin enables the voltage refer-

ence. The signal “REF NOT READY” does not go low until

VIN exceeds its under-voltage lockout threshold (typically

2.2V). Assume that an external resistor is placed between

the IN and the SHDN SS pins during startup. The voltage

The input bias current of the error amplifier will introduce

an error of:

( ) ∆9287

9287

=

−

Q$

•

5°«5

9

• 

(2)

reference is enabled when the SHDN SS voltage rises to

0.9V. Before VIN reaches 2.2V, “REF NOT READY” is high.

Q2 turns on and the Zener diode Z1 loosely regulates the

SHDN SS voltage to 1V (above the reference enabling volt-

age). The optional external resistor limits the current drawn

during under-voltage lockout.

The percentage error of a VOUT = 5V converter with R1 =

100kΩ and R2 = 301kΩ is

( ) ∆9287

9287

= − Q$ •

N°«N

9

• 

= −

When VIN exceeds 2.2V, “REF NOT READY” goes low. Q2 turns

This error is much less than the ratio tolerance resulting

from the use of 1% resistors in the divider string.

off, releasing SHDN SS. If an external capacitor is connected

from the SHDN SS pin to the ground, the SHDN SS voltage

will ramp up slowly. The error amplifier output, which is

 2007 Semtech Corp.

8

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