S-8242B Просмотр технического описания (PDF) - Seiko Instruments Inc
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S-8242B Datasheet PDF : 30 Pages
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BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series
Rev.1.4_00
Pin Configurations
SNT-8A
Top view
1
8
2
7
3
6
4
5
Figure 2
8-Pin TSSOP
Top view
1
8
2
7
3
6
4
5
Figure 3
Table 3
Pin No.
Symbol
Description
Connection of charge control FET gate
1
CO
(CMOS output)
2
DO
Connection of discharge control FET gate
(CMOS output)
3
NC*1
No connection
4
VSS
Connection for negative power supply input
and negative voltage of battery 2
5
VC
Connection for negative voltage of battery 1
and positive voltage of battery 2
6
VDD
Connection for positive power supply input
and positive voltage of battery 1
7
NC*1
No connection
8
VM
Voltage detection between VM and VSS
(overcurrent/charger detection pin)
*1. The NC pin is electrically open.
The NC pin can be connected to VDD or VSS.
Remark For the external views, refer to the package drawings.
Table 4
Pin No.
Symbol
Description
1
CO
Connection of charge control FET gate
(CMOS output)
2
DO
Connection of discharge control FET gate
(CMOS output)
3
NC*1
No connection
Connection for negative power supply input
4
VSS
and negative voltage of battery 2
5
VC
Connection for negative voltage of battery 1
and positive voltage of battery 2
Connection for positive power supply input
6
VDD
and positive voltage of battery 1
7
NC*1
No connection
8
VM
Voltage detection between VM and VSS
(overcurrent/charger detection pin)
*1. The NC pin is electrically open.
The NC pin can be connected to VDD or VSS.
Remark For the external views, refer to the package drawings.
4
Seiko Instruments Inc.
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