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RT9238

VRM8.5 PWM and Triple Linear Power System Controller

Richtek Technology 

RT9238

Preliminary

PWM MOSFET Selection and Considerations

In high-current PWM applications, the MOSFET

power dissipation, package selection and heatsink

are the dominant design factors. The power

dissipation includes two main loss components:

conduction losses and switching losses. These

losses are distributed between the upper and lower

MOSFET according to the duty factor. The

conduction losses are the main component of power

dissipation for the lower MOSFETs. Only the upper

MOSFET has significant switching losses, since the

lower device turns on and off into near zero voltage.

The equations presented assume linear voltage-

current transitions and do not model power losses

due to the lower MOSFET’s body diode or the output

capacitances associated with either MOSFET. The

gate charge losses are dissipated by the controller IC

(RT9238) and do not contribute to the MOSFETs’

heat rise. Ensure that both MOSFETs are within their

maximum junction temperature at high ambient

temperature by calculating the temperature rise

according to package thermal resistance

specifications. A separate heatsink may be

necessary depending upon MOSFET power, package

type, ambient temperature and air flow.

PUPPER

=

IO 2

× RDS(ON) ×

VIN

VOUT

+

IO ×

VIN × tSW

2

× FS

PLOWER

=

IO 2

× RDS(ON) × (VIN

VIN

−

VOUT)

The RDS(ON) is different for the two equations above

even if the same device is used for both. This is

because the gate drive applied to the upper MOSFET

is different than the lower MOSFET. Fig.15 shows the

gate drive where the upper MOSFET’s gate-to-

source voltage is approximately VCC less the input

supply. For +5V main power and +12VDC for the

bias, the approximate gate-to-source voltage of Q1 is

7V. The lower gate drive voltage is about 8V. A logic-

level MOSFET is a good choice for Q1 and a logic-

level MOSFET can be used for Q2 if its absolute

www.richtek-ic.com.tw

20

gate-to-source voltage rating exceeds the maximum

voltage applied to VCC.

+12V

VCC

UGATE

PHASE

LGATE

PGND

GND

+5V OR LESS

Q1

NOTE:

VGS ≈ VCC - 5V

Q2

CR1

NOTE:

VGS ≈ 8V

Fig.15 Upper Gate Drive-direct VCC Drive

Rectifier CR1 is a clamp that catches the negative

inductor swing during the dead time between the turn

off of the lower MOSFET and the turn on of the upper

MOSFET. For best results, the diode must be a

surface-mount Schottky type to prevent the parasitic

MOSFET body diode from conducting. It is

acceptable to omit the diode and let the body diode of

the lower MOSFET clamp the negative inductor

swing, but one must ensure the PHASE node

negative voltage swing does not exceed -3V to -5V

peak. The diode’s rated reverse breakdown voltage

must be equal or greater to 1.5 times the maximum

input voltage.

Linear Controllers Transistor Selection

The RT9238 linear controllers are compatible with

both NPN bipolar as well as N-channel MOSFET

transistors. The main criteria for selection of pass

transistors for the linear regulators is package

selection for efficient removal of heat. The power

dissipated in a linear regulator is

PLINEAR = IO × (VIN − VOUT)

Select a package and heatsink that maintains the

junction temperature below the maximum desired

temperature with the maximum expected ambient

temperature.

When selecting bipolar NPN transistors for use with

the linear controllers, insure the current gain at the

DS9238-01 July 2001

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