HM62G36256 Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HM62G36256

8M Synchronous Fast Static RAM (256k-word × 36-bit)

Hitachi -> Renesas Electronics 

HM62G36256 Series

Notes: 1. Bit number1 is the first scan bit to exit the chip.

2. The NC pads listed in this table are indeed no connects, but are represented in the boundary

scan register by a “Place Holder”. Placeholder registers are internally connected to VSS.

3. In Boundary scan mode, differential input K and K are referred to each other and must be at

opposite logic levels for reliable operation.

4. ZZ must remain at VIL during boundary scan.

5. In boundary scan mode, ZQ must be driven to VDDQ or VSS supply rail to ensure consistent results.

6. M1 and M2 must be driven to VDD or VSS supply rail to ensure consistent results.

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