R5F212H1SDSP Просмотр технического описания (PDF) - Renesas Electronics

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R5F212H1SDSP

RENESAS MCU R8C FAMILY / R8C/2x SERIES

Renesas Electronics 

Table of Contents

SFR Page Reference ........................................................................................................................... B - 1

1. Overview ......................................................................................................................................... 1

1.1 Features ..................................................................................................................................................... 1

1.1.1 Applications .......................................................................................................................................... 1

1.1.2 Specifications ........................................................................................................................................ 1

1.2 Product List ............................................................................................................................................... 4

1.3 Block Diagram .......................................................................................................................................... 6

1.4 Pin Assignment .......................................................................................................................................... 8

1.5 Pin Functions ........................................................................................................................................... 12

2. Central Processing Unit (CPU) ..................................................................................................... 14

2.1 Data Registers (R0, R1, R2, and R3) ...................................................................................................... 15

2.2 Address Registers (A0 and A1) ............................................................................................................... 15

2.3 Frame Base Register (FB) ....................................................................................................................... 15

2.4 Interrupt Table Register (INTB) .............................................................................................................. 15

2.5 Program Counter (PC) ............................................................................................................................. 15

2.6

2.7

2.8

2.8.1

2.8.2

2.8.3

User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) .................................................................. 15

Static Base Register (SB) ........................................................................................................................ 15

Flag Register (FLG) ................................................................................................................................ 15

Carry Flag (C) ..................................................................................................................................... 15

Debug Flag (D) ................................................................................................................................... 15

Zero Flag (Z) ....................................................................................................................................... 15

2.8.4 Sign Flag (S) ....................................................................................................................................... 15

2.8.5 Register Bank Select Flag (B) ............................................................................................................ 15

2.8.6 Overflow Flag (O) .............................................................................................................................. 15

2.8.7

2.8.8

2.8.9

2.8.10

Interrupt Enable Flag (I) ..................................................................................................................... 16

Stack Pointer Select Flag (U) .............................................................................................................. 16

Processor Interrupt Priority Level (IPL) ............................................................................................. 16

Reserved Bit ........................................................................................................................................ 16

3. Memory ......................................................................................................................................... 17

4. Special Function Registers (SFRs) ............................................................................................... 19

5. Resets ........................................................................................................................................... 31

5.1 Hardware Reset ....................................................................................................................................... 34

5.1.1 When Power Supply is Stable ............................................................................................................. 34

5.1.2 Power On ............................................................................................................................................ 34

5.2 Power-On Reset Function ....................................................................................................................... 36

5.3 Voltage Monitor 0 Reset ......................................................................................................................... 37

5.4 Voltage Monitor 1 Reset ......................................................................................................................... 37

5.5 Voltage Monitor 2 Reset ......................................................................................................................... 37

5.6 Watchdog Timer Reset ............................................................................................................................ 38

5.7 Software Reset ......................................................................................................................................... 38

6. Voltage Detection Circuit .............................................................................................................. 39

6.1 VCC Input Voltage .................................................................................................................................. 47

6.1.1 Monitoring Vdet0 ............................................................................................................................... 47

A-1

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