QT300(2003) Просмотр технического описания (PDF) - Quantum Research Group
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QT300 Datasheet PDF : 12 Pages
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4 Single-Wire (1W) UART
Interface
The single wire ('1W') UART option allows all
communications to take place over a single
bidirectional line with a 10K pullup resistor. The host
device triggers the QT300 to acquire by means of a
pulse sent to the QT300 over the wire. The Baud rate
is established by the width of this pulse; the pulse
width establishes the bit rate of the UART
transmission to follow. The QT300 then acquires, and
responds by sending two bytes of data back over the
1W line with a delay between the bytes as determined
by parameter MLS.
1W operation permits a device to be controlled from a
single pin on a host controller, using either a hardware
or software UART. Several QT300’s can coexist on a
single host pin, provided there is some logic steering.
This mode is set via the cloning process using
parameter SM (see Section 6).
4.1 1W UART Specifications
The QT300 operates in 1W UART mode with the
following specifications:
Baud rate range
Data length
Stop bit
Parity
Idle state
4,800 to 9,600 bits/sec
2 bytes (16 bits total)
1 (each byte)
None
High
The 1W line must have a pullup resistor on it (i.e.
10K), or 1W communications will not function.
Figure 4-1 UART and Trigger Pulse Signal.
back to the host. During idle times this pin floats and
therefore must be connected to a pullup resistor.
The DRDY line can be used as a Slave Select line (SS).
The host does not need this line to operate in many cases.
DRDY can be used to 'frame' byte transmissions.
Between bytes /DRDY will go high for a period determined
by the MLS setup parameter; the minimum period is 8.3µs.
A typical Master mode SPI sequence is:
1) Host pulses /REQ low for ≥30µs.
2) QT300 acquires a signal in response to /REQ.
3) QT300 pulls /DRDY low when ready to send data.
4) Host detects /DRDY low and prepares to receive data.
5) QT300 clocks out first byte of data (MSB).
6) QT300 sets /DRDY high for a duration determined by
Setup parameter MLS.
7) QT300 pulls /DRDY low.
8) QT300 clocks out the low byte (LSB).
9) QT300 releases /DRDY to float high.
4.2 UART 1W Protocol
The QT300 acquires and transmits only on request.
The sequence is:
1) The host generates a pulse on the 1W pin; the
pulse width must match the Baud rate (bit width)
of the expected return Baud rate from the QT300.
This pulse actually sets the Baud rate each time,
and so it can vary from one acquire to another. See
Section 4.3 and Figure 4-1.
2) The 1W pulse width is measured by the QT300 to
determine the Baud rate.
3) The host floats 1W high.
4) The QT300 acquires the signal to completion.
5) QT300 returns data in the following UART format:
start bit (low)
8 bits, high byte
stop bit (high)
delay (determined by MLS setup)
start bit (low)
8 bits, low byte
stop bit (high)
6) The QT300 floats the 1W line and enters idle mode.
LQ
5
QT300 R1.01 21/09/03
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