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AD673SD Просмотр технического описания (PDF) - Analog Devices

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AD673SD
ADI
Analog Devices ADI
AD673SD Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
AD673–SPECIFICATIONS (TA = +25؇C, V+ = +5 V, V– = –12 V or –15 V, all voltages measured with respect to
digital common, unless otherwise noted)
Model
AD673J
AD673S
Min
Typ
Max
Min
Typ
Max
Units
RESOLUTION
RELATIVE ACCURACY,l
TA = TMIN to TMAX
FULL-SCALE CALIBRATION2
UNIPOLAR OFFSET
BIPOLAR OFFSET
DIFFERENTIAL NONLINEARITY,3
TA = TMIN to TMAX
TEMPERATURE RANGE
TEMPERATURE COEFFICIENTS
Unipolar Offset
Bipolar Offset
Full-Scale Calibration2
POWER SUPPLY REJECTION
Positive Supply
+4.5 V+ +5.5 V
Negative Supply
–15.75 V V– –14.25 V
–12.6 V V– –11.4 V
ANALOG INPUT IMPEDANCE
ANALOG INPUT RANGES
Unipolar
Bipolar
OUTPUT CODING
Unipolar
Bipolar
LOGIC OUTPUT
Output Sink Current
(VOUT = 0.4 V max, TMIN to TMAX)
Output Source Current4
(VOUT = 2.4 V min, TMIN to TMAX)
Output Leakage
LOGIC INPUTS
Input Current
Logic “1”
Logic “0”
CONVERSION TIME, TA and
TMIN to TMAX
POWER SUPPLY
V+
V–
OPERATING CURRENT
V+
V–
8
8
Bits
؎1/2
؎1/2
؎1/2
LSB
؎1/2
LSB
±2
±2
LSB
؎1/2
؎1/2
LSB
؎1/2
؎1/2
LSB
8
8
Bits
8
8
Bits
0
+70
–55
+125
°C
؎1
؎1
LSB
؎1
؎1
LSB
؎2
؎2
LSB
؎2
؎2
LSB
؎2
؎2
LSB
؎2
؎2
LSB
3.0
5.0
7.0
3.0
5.0
7.0
k
0
+10
0
+10
V
–5
+5
–5
+5
V
Positive True Binary
Positive True Offset Binary
Positive True Binary
Positive True Offset Binary
3.2
0.5
2.0
10
20
+4.5
+5.0
–11.4
–15
15
9
3.2
0.5
؎40
؎100
2.0
0.8
30
10
20
+7.0
+4.5
+5.0
–16.5
–11.4
–15
20
15
15
9
mA
mA
؎40
µA
؎100
µA
V
0.8
V
30
µs
+7.0
V
–16.5
V
20
mA
15
mA
NOTES
1Relative accuracy is defined as the deviation of the code transition points from the ideal transfer point on a straight line from the zero to the full scale of the device.
2Full-scale calibration is guaranteed trimmable to zero with an external 200 potentiometer in place of the 15 fixed resistor.
Full scale is defined as 10 volts minus 1 LSB, or 9.961 V.
3Defined as the resolution for which no missing codes will occur.
4The data output lines have active pull-ups to source 0 5 mA. The DATA READY line is open collector with a nominal 6 kinternal pull-up resistor.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
–2–
REV. A

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