PI74AVC16244(2001) Просмотр технического описания (PDF) - Pericom Semiconductor
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PI74AVC16244 Datasheet PDF : 10 Pages
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PI74AVC+16244
2.5V 16-Bit Buffer Driver
with 3-State Outputs 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Maximum Ratings
(Above which the useful life may be impaired.
For user guidelines, not tested.)
Product Pin Description
Supply voltage range, VCC .............................. 0.5V to +4.6V
Input voltage range, VI .................................... 0.5V to +4.6V
Voltage range applied to any output in the
high-impedance or power-off state, VO(1) ........ 0.5V to +4.6V
Voltage range applied to any output in the
high or low state, VO(1,2) ............................ 0.5V to VCC+0.5V
Input clamp current, IIK (VI <0) ..................................... 50mA
Output clamp current, IOK (VO <0) ............................... 50mA
Continuous output current, IO ..................................... ±50mA
Continuous current through each VCC or GND ...........±100mA
Package thermal impedance, θJA(3): package A ........... 64°C/W
package K .......... 48°C/W
Storage Temperature range, Tstg ..................... 65°C to 150°C
Notes:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
1. Input & output negative-voltage ratings may be exceeded if the
input and output curent rating are observed.
2. Output positive-voltage rating may be exceeded up to 4.6V
maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with
JESD 51.
Truth Table(1)
Inputs
nOE
nAx
L
H
L
L
H
X
Notes:
1. H = High Signal Level
L = Low Signal Level
X = Dont Care or Irrelevant
Z = High Impedance
Outputs
nYx
H
L
Z
Pin Name
nOE
nAx
nYx
GND
VCC
Description
3-State Output Enable Inputs (Active LOW)
Inputs
3-State Outputs
Ground
Power
Product Pin Configuration
1OE
1Y1
1Y2
GND
1Y3
1Y4
VCC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
VCC
4Y1
4Y2
GND
4Y3
4Y4
4OE
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11 48-Pin 38
12 A,K 37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
2OE
1A1
1A2
GND
1A3
1A4
VCC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
VCC
4A1
4A2
GND
4A3
4A4
3OE
2
PS8507A 12/07/01
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