W83194R-67B Просмотр технического описания (PDF) - Winbond

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W83194R-67B

100MHZ 3-DIMM CLOCK FOR VIA MVP4

Winbond 

W83194R-67B

8.3.6 Register 5: Peripheral Control (1 = Active, 0 = Inactive)

Bit

@PowerUp Pin

Description

7

1

- Reserved

6

1

- Reserved

5

1

- Reserved

4

1

- Reserved

3

1

- Reserved

2

1

- Reserved

1

1

48 REF1 (Active / Inactive)

0

1

2 REF0 (Active / Inactive)

PRELIMINARY

8.3.7 Register 6: Winbond Chip ID Register (Read Only)

Bit

@PowerUp Pin

Description

7

0

- Winbond Chip ID

6

1

- Winbond Chip ID

5

0

- Winbond Chip ID

4

1

- Winbond Chip ID

3

1

- Winbond Chip ID

2

0

- Winbond Chip ID

1

0

- Winbond Chip ID

0

0

- Winbond Chip ID

NOTE:

1.Inactive means outputs are held LOW and are disabled from switching.

2.Latched Frequency Selects(FS#) will be inverted logic load of the input frequency select pin

conditions.

- 10 -

Publication Release Date: Dec.. 1999

Revision 0.50

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