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W78L812A24FL(2006) Просмотр технического описания (PDF) - Winbond

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W78L812A24FL
(Rev.:2006)
Winbond
Winbond Winbond
W78L812A24FL Datasheet PDF : 31 Pages
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W78LE812/W78L812A
5.6 Watchdog Timer
The Watchdog timer is a free-running timer which can be programmed by the user to serve as a
system monitor, a time-base generator or an event timer. It is basically a set of dividers that divide the
system clock. The divider output is selectable and determines the time-out interval. When the time-out
occurs, a system reset can also be caused if it is enabled. The main use of the Watchdog timer is as a
system monitor. This is important in real-time control applications. In case of power glitches or electro-
magnetic interference, the processor may begin to execute errant code. If this is left unchecked the
entire system may crash. The watchdog time-out selection will result in different time-out values
depending on the clock speed. The Watchdog timer will de disabled on reset. In general, software
should restart the Watchdog timer to put it into a known state. The control bits that support the
Watchdog timer are discussed below.
5.6.1 Watchdog Timer Control Register
Bit:
7
6
5
4
ENW CLRW WIDL
-
3
2
1
0
-
PS2 PS1 PS0
Mnemonic: WDTC
Address: 8FH
ENW : Enable watch-dog if set.
CLRW : Clear watch-dog timer and prescaler if set. This flag will be cleared automatically
WIDL : If this bit is set, watch-dog is enabled under IDLE mode. If cleared, watch-dog is disabled
under IDLE mode. Default is cleared.
PS2, PS1, PS0: Watch-dog prescaler timer select. Prescaler is selected when set PS2 0 as follows:
PS2 PS1 PS0
PRESCALER SELECT
00 0
2
01 0
4
00 1
8
01 1
16
10 0
32
10 1
64
11 0
128
11 1
256
The time-out period is obtained using the following equation:
1 × 214 × PRESCALER × 1000 × 12 mS
OSC
Before Watchdog time-out occurs, the program must clear the 14-bit timer by writing 1 to WDTC.6
(CLRW). After 1 is written to this bit, the 14-bit timer, prescaler and this bit will be reset on the next
instruction cycle. The Watchdog timer is cleared on reset.
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