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PCF8536AT Просмотр технического описания (PDF) - NXP Semiconductors.

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PCF8536AT Datasheet PDF : 74 Pages
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NXP Semiconductors
PCF8536
Universal LCD low multiplex driver with 6 channel PWM generator
8. Functional description
The PCF8536 is a versatile peripheral device designed to interface any microcontroller to
a wide variety of LCDs and 6 backlight LEDs. It can directly drive any multiplexed LCD
containing up to eight backplanes and up to 44 segments.
8.1 Commands of PCF8536
The PCF8536 is controlled by 15 commands, which are defined in Table 4. Any other
combinations of operation code bits that are not mentioned in this document may lead to
undesired operation modes of PCF8536.
Table 4. Commands of PCF8536
Command name
Register
selection
RS[1:0][1]
initialize
0
0
OTP-refresh
0
0
PWM-inversion
0
0
mode-settings
0
0
oscillator-control
0
0
GPO-output-config
0
0
0
0
0
0
set-MUX-mode
0
0
set-bias-mode
0
0
frame-frequency-LCD 0
0
frame-frequency-PWM 0
0
GPO-static-data
0
0
0
0
load-data-pointer-LCD 0
0
load-data-pointer-PWM 0
0
write-RAM-data
0
1
write-PWM-data
1
0
Bits
Reference
7
6
5
4
3
2
1
0
0
0
0
1
0
1
1
0
Section 8.1.1
1
1
1
1
0
0
0
0
Section 8.1.2
0
0
0
1
0
1
0
PWMI Section 8.1.3
0
1
0
1
BPS INV PD E
Section 8.1.4
0
0
0
1
1
EFR COE OSC Section 8.1.5
1
1
0
0
GPM1[1:0] GPM0[1:0] Section 8.1.6
1
1
0
1
GPM3[1:0] GPM2[1:0]
1
1
1
0
GPM5[1:0] GPM4[1:0]
0
0
0
0
0
0
M[1:0]
Section 8.1.7
0
0
0
0
0
1
B[1:0]
Section 8.1.8
0
0
1
FD[4:0]
Section 8.1.9
0
1
0
0
FP[3:0]
Section 8.1.10
0
1
1
0
0
GPO0 GPO1 GPO2 Section 8.1.11
0
1
1
0
1
GPO3 GPO4 GPO5
1
0
DP[5:0]
Section 8.1.12
0
1
1
1
0
PP[2:0]
Section 8.1.13
D[7:0]
Section 8.1.14
0
P[6:0]
Section 8.1.15
[1] Information about control byte and register selection see Section 9.1 on page 46.
8.1.1 Command: initialize
This command generates a chip-wide reset. It has the same function as the RESET pin.
Reset takes 1 ms to complete.
Table 5. Initialize - initialize command bit description
Bit
Symbol
Value
Description
7 to 0 -
0001 0110
fixed value
PCF8536
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 October 2011
© NXP B.V. 2011. All rights reserved.
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