Philips Semiconductors
Digital telephone answering machine chip
Product specification
PCD6003
10.3 SFR mapping
The SFR mapping for the microcontroller is shown in Table 12. All SFRs and their reset states are described in Table 13.
Table 12 SFR mapping
SFR
ADDRESS
(HEX) ADDRESSABLE(1)
SPECIAL FUNCTION REGISTERS 8 BITS EACH
ONLY BYTE ADDRESSABLE
F8 to FF
F0 to F7
E8 to EF
IP1(2)
B(2)
IEN1(2)
−
−
−
−
−
−
WDT(2)
−
−
−
−
−
−
WDTKEY
IX1
−
−
−
−
−
−
E0 to E7
D8 to DF
D0 to D7
ACC(2)
S1CON(2)
PSW(2)
−
−
−
−
−
−
−
S1STA(2)(3) S1DAT(2) S1ADR(2) −
−
−
−
−
−
−
−
−
−
−
C8 to CF
C0 to C7
B8 to BF
B0 to B7
A8 to AF
A0 to A7
MCON
IRQ1
IP0(2)
P3(2)
IEN0(2)
−
MBUF
INTC
XWUD
−
MCSC
−
MSTAT
GPADR(3)
VREFR
−
MCSD
DTM0(3)
−
GPADC
CDVC1
−
ALTP
DTM1(3)
−
GPDAR
CDVC2
−
−
DTM2(3)
−
SYMOD
CDTR1(4)
PMTR1(4)
−
MTD0
−
−
−
PMTR2(4)
−
MTD1
−
DTCON
TCTRL(4)
CDTR2(4)
−
MTD2
98 to 9F
90 to 97
88 to 8F
P4
P1(2)
TCON(2)
SPCON
−
TMOD(2)
CKCON
−
TL0(2)
RTCON
−
TL1(2)
−
−
TH0(2)
CDTR1(4) −
−
−
TH1(2)
−
P4CFG
−
−
80 to 87 −
SP(2)
DPL(2)
DPH(2)
−
−
−
PCON
Notes
1. SFRs in this column are both bit and byte-addressable.
2. Complies to 80C51 family architecture specification.
3. These registers are read only (all other SFRs are read/write).
4. Reserved register, used for testing purposes. Writing of reserved or undocumented bits might lead to unexpected
behaviour of the device (see Section 10.8).
2001 Apr 17
23