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PCD5095

DECT baseband controller

Philips Electronics 

Philips Semiconductors

Objective specification

DECT baseband controller

PCD5095

1 FEATURES

• 80C51 ports P0, P1, P2 and P3 available for interfacing

to display, keyboard, I2C-bus, interrupt sources and/or

external memory. Integrated 64 kbyte ROM, 3 kbytes of

data memory and 1kbyte System Data RAM. External

program memory is addressable up to 128 kbytes

• +2.7 to 5 V port (P0 to P3) interface

• TDMA frame (de)multiplexing, transmission or reception

can be programmed for any slot

• Ciphering, scrambling, CRC checking/generation and

protected B-fields

• Speech and data buffering space for six handsets

• Local call and B-field loop-back

• Two interrupt lines for BML and DSP to interrupt 80C51

• On-chip, three channel time-multiplexed 8-bit

Analog-to-Digital Converter (ADC) for RSSI

measurement, one for battery voltage measurement

and one channel available for other purposes

• On-chip 8-bit Digital-to-Analog Converter (DAC) for

electronic potentiometer function

• Phase error measurement and phase error correction by

hardware

• DACs and ADCs for dynamic earpiece and dynamic or

electret microphone

• On-chip reference voltage

• On-chip supply for electret microphone

• Very low ohmic buzzer output

• Serial interface to external ADPCM CODEC (PCD5032)

or 8 kHz u-law samples

• Speech switch for Digital Telephone Answering

Machine (DTAM) connected to SPI interface

• IOM®-2 interface (Siemens registered trademark)

• Serial interface to synthesizer for frequency

programming

• Programmable polarity and timing of radio-control

signals

• GMSK pulse shaper

• On-chip comparator for use as data-slicer

• Easy interfacing with radio circuits, operating at other

supply voltage (RF supply pin with level shifter for RF

signals)

• Low-power oscillator with integrated frequency

adjustment

• QFP100 package

• Power-on-reset

• Programmable power-down modes

• Low supply voltage (2.7 to 3.6 V)

• CMOS technology.

1.1 DSP software features

• 3x ADPCM transcoding complying with G.726

• A-Law encoding and decoding complying with G.711

• 4 Channel bidirectional ADPCM interface to the IOM®-2

and radio interface

• Programmable channel switching and buffers

• Channel mute.

For each DSP software version a separate manual is

available in which detailed information is provided on how

parameters must be set. For further information please

contact Philips Semiconductors.

2 GENERAL DESCRIPTION

The PCD5095 is designed for GAP-compliant business

systems, PABX and WLL. Two modes can be selected:

three channel ADPCM CODEC with conversion of

ADPCM samples to linear PCM format and vice versa, the

second mode copies four ADPCM samples into two IOM

data buffers and vice versa. In both modes the DSP

controls the bidirectional data flow from the radio interface

and the IOM®-2 interface. The 80C51 controls the DECT

protocol and the IOM®-2 interface. The performance of the

embedded 80C51 microcontroller is twice the performance

of the classic architecture. The PCD5095 has 64 kbytes of

PROM program memory and 3 kbytes of data memory

on-chip. In addition there is 1 kbyte of on-chip data

memory that is shared with the Burst Mode Logic (BML),

the DSP and the System Data RAM (SDR).

3 ORDERING INFORMATION

TYPE

NUMBER

PCD5095H

NAME

QFP100

PACKAGE

DESCRIPTION

plastic quad flat package; 100 leads (lead length 1.95 mm);

body 14 × 20 × 2.8 mm

VERSION

SOT317-2

1997 Nov 19

3

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