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PCD5003 Просмотр технического описания (PDF) - Philips Electronics

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PCD5003
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PCD5003 Datasheet PDF : 44 Pages
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Philips Semiconductors
Advanced POCSAG Paging Decoder
Product specification
PCD5003
This is done for a period of up to 15 batches, allowing
recovery of synchronization from long fades in the radio
signal. Detection of preamble switches to
‘preamble receive’ mode, while sync word detection
switches to ‘data receive’ mode. When neither is found
within a period of 15 batches, the radio signal is
considered lost and ‘carrier off’ mode is entered.
The purpose of carrier off mode is to detect a valid radio
transmission and synchronize to it quickly and efficiently.
Because transmissions may start at random, the decoder
enables the receiver for 1 codeword in every
18 codewords looking for preamble or sync word. By using
a buffer containing 32 bits (n bits from the current scan,
32 n from the previous scan) effectively every batch bit
position can be tested within a continuous transmission of
at least 18 batches. Detection of preamble switches to
‘preamble receive’ mode, while sync word detection
switches to ‘data receive’ mode.
7.13 Call termination
Call reception is terminated:
Upon reception of any address codeword (including Idle
codeword) requiring no more than single bit error
correction
In ‘data fail’ mode, when a sync word is not found at the
expected batch position
When a forced call termination command is received
from an external controller.
The last method permits an external controller to stop call
reception depending on the number and type of errors
which occurred in a call. After a forced call termination the
decoder will enter ‘data fail’ mode.
The type of error correction as well as the call termination
conditions are indicated by status bits in the message data
output.
Following call termination, transfer of the data received
since the previous sync word period is initiated by means
of an interrupt to the external controller.
7.14 Call data output format
POCSAG call information is stored in the decoder SRAM
in blocks of 3 bytes per codeword. Each stored call
consists of a call header, followed by message data blocks
and concluded by a call terminator. In the event of
concatenated messages the call terminator is replaced
with the call header of the next message. An alert-only call
only has a call header and a call terminator.
The formats of a call header, a message data block and a
call terminator are shown in Tables 4, 6 and 8.
A Call Header contains information on the last sync word
received, the RIC which began call reception and the type
of error correction performed on the address codeword.
A Message Data block contains the data bits from a
message codeword plus the type of error correction
performed. No deformatting is done on the data bits:
numeric data appear as 4-bit groups per digit,
alphanumeric data have a 7-bit ASCII representation.
The Call Terminator contains information on the last sync
word received, information on the way the call was
terminated (forced call termination command, loss of sync
word in ‘data fail’ mode) and the type of error correction
performed on the terminating codeword.
7.15 Sync word indication
The sync word recognized by the PCD5003 is shown in the
call header (bits S3 to S1). The decimal value represents
the identifier number in the EEPROM of the UPSW in
question. A value of 7 indicates the standard POCSAG
sync word.
7.16 Error type indication
Table 10 shows how the different types of detected errors
are encoded in the call data output format.
A message codeword containing more than a single bit
error (bit E3 = 1) may appear as an address codeword
(bit M1 = 0) after error correction. In this event the
codeword is processed as message data and does not
cause call termination.
7.17 Data transfer
Data transfer is initiated either during sync word periods or
as soon as the receiver is disabled after call termination.
If the SRAM buffer is full, data transfer is initiated
immediately during the next codeword.
When the PCD5003 is ready to transfer received call data
an external interrupt will be generated via output INT.
Any message data can be read by accessing the RAM
output register via the I2C-bus interface. Bytes will be
output starting from the position indicated by the RAM read
pointer.
1997 Jun 24
10

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