Philips Semiconductors
8-bit high-speed analog-to-digital converter
Product specification
TDA8714
SYMBOL
PARAMETER
EFFECTIVE BITS (note 6; see Figs 7 and 13)
EB
effective bits
TDA8714/4
effective bits
TDA8714/6
effective bits
TDA8714/7
TWO-TONE (note 7)
TTIR
two-tone intermodulation rejection
BIT ERROR RATE
BER
bit error rate
DIFFERENTIAL GAIN (note 8)
Gdiff
differential gain
DIFFERENTIAL PHASE (note 8)
ϕdiff
differential phase
Timing (note 9; see Figs 3 and 5; fclk = 80 MHz)
tds
sampling delay time
th
output hold time
td
output delay time
3-state output delay times (see Fig.4)
tdZH
enable HIGH
tdZL
enable LOW
tdHZ
disable HIGH
tdLZ
disable LOW
CONDITIONS
MIN. TYP. MAX. UNIT
fclk = 40 MHz
fi = 4.43 MHz
fi = 7.5 MHz
fclk = 60 MHz
fi = 4.43 MHz
fi = 7.5 MHz
fi = 10 MHz
fclk = 80 MHz
fi = 4.43 MHz
fi = 7.5 MHz
fi = 10 MHz
fi = 15 MHz
fclk = 40 MHz
fclk = 40 MHz;
fi = 4.43 MHz;
VI = ±16 LSB at
code 128
fclk = 40 MHz;
fi = 4.43 MHz
fclk = 40 MHz;
fi = 4.43 MHz
−
7.75 −
bits
−
7.6 −
bits
−
7.7 −
bits
−
7.55 −
bits
−
7.4 −
bits
−
7.7 −
bits
−
7.5 −
bits
−
7.2 −
bits
−
6.3 −
bits
−
−56 −
dB
−
10−11 −
times/
samples
−
0.6 −
%
−
0.8 −
deg
−
−
2
ns
5
−
−
ns
−
10
11
ns
−
40
44
ns
−
12
16
ns
−
50
54
ns
−
10
14
ns
1997 Oct 29
8