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PCA8591P

8-bit A/D and D/A converter

Philips Electronics 

Philips Semiconductors

8-bit A/D and D/A converter

Product specification

PCF8591

7.4 A/D conversion

The A/D converter makes use of the successive

approximation conversion technique. The on-chip D/A

converter and a high-gain comparator are used

temporarily during an A/D conversion cycle.

An A/D conversion cycle is always started after sending a

valid read mode address to a PCF8591 device. The A/D

conversion cycle is triggered at the trailing edge of the

acknowledge clock pulse and is executed while

transmitting the result of the previous conversion (see

Fig.8).

Once a conversion cycle is triggered an input voltage

sample of the selected channel is stored on the chip and is

converted to the corresponding 8-bit binary code. Samples

picked up from differential inputs are converted to an 8-bit

two’s complement code (see Figs 9 and 10).

The conversion result is stored in the ADC data register

and awaits transmission. If the auto-increment flag is set

the next channel is selected.

The first byte transmitted in a read cycle contains the

conversion result code of the previous read cycle. After a

Power-on reset condition the first byte read is a

hexadecimal 80. The protocol of an I2C-bus read cycle is

shown in Chapter 8, Figs 15 and 16.

The maximum A/D conversion rate is given by the actual

speed of the I2C-bus.

Fig.8 A/D conversion sequence.

1998 Jul 02

10

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