P4C188 Просмотр технического описания (PDF) - Semiconductor Corporation
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P4C188 Datasheet PDF : 12 Pages
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P4C188/188L
AC CHARACTERISTICS—READ CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Sym. Parameter
-10
-12
-15
-20
-25
-35
-45
Unit
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
tRC Read Cycle Time 10
12
15
20
25
35
45
ns
tAA Address Access
10
12
15
20
25
35
45 ns
Time
tAC Chip Enable
Access Time
10
12
15
20
25
35
45 ns
tOH Output Hold from 2
2
2
2
2
2
2
ns
Address Change
tLZ Chip Enable to
2
2
2
3
3
3
3
ns
Output in Low Z
tHZ Chip Disable to
5
6
6
8
10
20
25 ns
Output in High Z
tPU Chip Enable to
0
0
0
0
0
0
0
ns
Power Up Time
tPD Chip Disable to
Power Down
Time
10
12
15
20
25
35
45 ns
TIMING WAVEFORM OF READ CYCLE NO. 1(5)
TIMING WAVEFORM OF READ CYCLE NO. 2(6)
Notes:
5. CE is LOW and WE is HIGH for READ cycle.
6. WE is HIGH, and address must be valid prior to or coincident with CE
transition LOW.
7. Transition is measured ±200mV from steady state voltage prior to
change with specified loading in Figure 1. This parameter is sampled
and not 100% tested.
8. Read Cycle Time is measured from the last valid address to the first
transitioning address.
Document # SRAM112 REV A
Page 4 of 12
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