P4C163-25CMB Просмотр технического описания (PDF) - Semiconductor Corporation
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P4C163-25CMB Datasheet PDF : 12 Pages
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P4C163/163L
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Symbol
Parameter
-25
-35
-45
Unit
Min Max Min Max Min Max
tRC
Read Cycle Time
tAA
Address Access Time
tAC
Chip Enable
Access Time
25
35
45
ns
25
35
45 ns
25
35
45 ns
tOH
Output Hold from
Address Change
3
3
3
ns
tLZ
Chip Enable to
Output in Low Z
3
3
3
ns
tHZ
Chip Disable to
Output in High Z
10
15
20 ns
tOE
Output Enable
Low to Data Valid
13
18
20 ns
tOLZ
Output Enable
Low to Low Z
3
3
3
ns
tOHZ
Output Enable
High to High Z
12
15
20 ns
tPU
Chip Enable to
Power Up Time
0
0
0
ns
tPD
Chip Disable to
Power Down Time
20
20
25 ns
READ CYCLE NO. 1 (OE CONTROLLED)(5)
Notes:
5. WE is HIGH for READ cycle.
6. CE1 is LOW, CE2 is HIGH and OE is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with CE1 transition
LOW and CE2 transition HIGH.
8. Transition is measured ± 200mV from steady state voltage prior to
change, with loading as specified in Figure 1. This parameter is
sampled and not 100% tested.
Document # SRAM120 REV C
Page 4 of 12
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