P4C147-25DMB Просмотр технического описания (PDF) - Semiconductor Corporation
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P4C147-25DMB Datasheet PDF : 10 Pages
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P4C147
AC CHARACTERISTICS—WRITE CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Sym.
Parameter
-10
-12
-15
-20
-25
-35
Min Max Min Max Min Max Min Max Min Max Min Max
Unit
tWC Write Cycle Time
10
12
15
20
25
35
ns
tCW Chip Enable Time to End of Write 8
10
12
15
20
25
ns
tAW Address Valid to End of Write
8
10
12
15
20
25
ns
tAS Address Set-up Time
0
0
0
0
0
0
ns
tWP Write Pulse Width
tAH
Address Hold Time from
End of Write
8
10
12
14
15
18
ns
0
0
0
0
0
0
ns
tDW Data Valid to End of Write
5
6
7
9
12
15
ns
tDH Data Hold Time
0
0
0
0
0
0
ns
tWZ Write Enable to Output in High Z
5
6
7
9
12
15 ns
tOW Output Active from End of Write 0
0
0
0
0
0
ns
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)(9)
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE CONTROLLED)(9)
Notes:
9. CE and WE must be LOW for WRITE cycle.
10. If CE goes HIGH simultaneously with WE high, the output remains
in a high impedance state.
11. Write Cycle Time is measured from the last valid address to the first
transition address.
Document # SRAM103 REV A
Page 4 of 10
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