GLT6400L16SL-70TC Просмотр технического описания (PDF) - G-Link Technology
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GLT6400L16SL-70TC Datasheet PDF : 13 Pages
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G-LINK
GLT6400L16
Ultra Low Power 256k x 16 CMOS SRAM
May 2003(Rev. 1.4)
Data Retention Waveform (TA = 0°C to 70°C)
Data Retention Mode
Vcc
2.7V
tCDR
VDR >= 1.0V
CE1
VIH
VDR
2.7V
tR
VIH
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Time
Input and Output Timing
Reference Level
Output Load Condition
CL = 30pf + 1TTL Load
0.4V to 2.4V
5 ns
1.4V
AC Test Loads and Waveforms
TTL
CL*
*Including Scope and Jig Capacitance
Read Cycle (9)( Vcc = 2.7V to 3.6V , TA = 0°C to 70°C )
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Output Hold from address Change
Chip Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
BLE , BHE Enable to Output in Low-Z
BLE , BHE Disable to Output in High-Z
BLE , BHE Access Time
70
Symbol
Min Max
tRC
70
tAA
70
tACE
70
tOE
40
tOH
10
tLZ
10
tHZ
25
tOLZ
5
tOHZ
25
tBLZ
5
tBHZ
25
tBA
40
85
Min Max
85
85
85
40
10
10
35
5
30
5
30
40
Unit Note
ns
ns
ns
ns
ns
ns 4,5
ns 3,4,5
ns
ns
ns 4,5
ns 3,4,5
ns
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