BS616UV4020 Просмотр технического описания (PDF) - Brilliance Semiconductor
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BS616UV4020
Brilliance Semiconductor
BS616UV4020 Datasheet PDF : 11 Pages
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BSI
BS616UV4020
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
5ns
0.5Vcc
AC TEST LOADS AND WAVEFORMS
2V
OUTPUT
1333 Ω
2V
OUTPUT
1333 Ω
INCLUDING
JIG AND
SCOPE
100PF
2000 Ω
INCLUDING
JIG AND
SCOPE
5PF
2000 Ω
FIGURE 1A
FIGURE 1B
OUTPUT
THEVENIN EQUIVALENT
800 Ω
1.2V
Vcc
GND
ALL INPUT PULSES
10%
→
90% 90%
←
→
FIGURE 2
10%
← 5ns
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
,
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC , Vcc=2.0V )
READ CYCLE
JEDEC
PARAMETER PARAMETER
NAME
NAME
DESCRIPTION
BS616UV4020-70
MIN. TYP. MAX.
t
AVAX
t
RC
Read Cycle Time
70
t
AVQV
t
AA
Address Access Time
70
t
E1LQV
t
ACS1
Chip Select Access Time
(CE1)
70
t
E2LQV
t
ACS2
Chip Select Access Time
(CE2)
70
t
BA
t (1)
BA
Data Byte Control Access Time
(LB,UB)
35
t
GLQV
t
OE
Output Enable to Output Valid
35
t
E1LQX
t
CLZ
Chip Select to Output Low Z
(CE2,CE1) 10
t
BE
t
BE
Data Byte Control to Output Low Z (LB,UB) 10
t
GLQX
t
OLZ
Output Enable to Output in Low Z
10
t
E1HQZ
t
CHZ
Chip Deselect to Output in High Z (CE2,CE1) 0
35
t
BDO
t
BDO
Data Byte Control to Output High Z (LB,UB) 0
35
t
GHQZ
t
OHZ
Output Disable to Output in High Z
0
30
t
AXQX
t
OH
Output Disable to Output Address Change
10
NOTE :
1. tBA is 35ns/50ns (@speed=70ns/100ns) with address toggle .
tBA is 70ns/100ns (@speed=70ns/100ns) without address toggle .
BS616UV4020-10
MIN. TYP. MAX.
100
100
100
100
50
50
15
15
15
0
40
0
40
0
35
15
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R0201-BS616UV4020
6
Revision 2.4
April 2002
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