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NCP5680

High Efficiency White LED Driver

ON Semiconductor 

NCP5680

ENTC: control the NTC input function

ENTC = 0 ³ the external NTC is de−activated and no

action is forwarded to the Power Flash current block.

ENTC = 1 ³ the external NTC is biased by the internal

current and the Power flash current is switched OFF when

the NTC drops below the minimum level defined by the

NTCREG register

ICHG: control the superCAP charging current during a

start up sequence

ICHG = 0 ³ the charging current is limited to 250 mA

maximum (125 mA typical)

ICHG = 1 ³ the charging current is limited to 350 mA

maximum (250 mA typical)

ENPH: control the photo sense

ENPH = 0 ³ the photo sense is de−activated

ENPH = 1 ³ the photo sense is activated

CONFIG1[7..0] Configuration register $02

CKPLS: this bit controls the LED1 & LED2 internal check

during a flash sequence

CKPLS = 0 ³ no LED check performed during a flash

sequence

CKPRC = 1 ³ the LED check are automatically

performed, during a flash sequence, the results can be read

from the STATUS register. If a fault is detected at any time

during a flash pulse, the flash sequence is immediately

stopped.

CKPRC: this bit controls the LED1 & LED2 internal

check out of a flash sequence.

CKPRC = 0 ³ no LED check performed

CKPRC = 1 ³ the LED check are automatically

performed (both LED1 and LED2), the results can be read

from the STATUS register.

BKL1: = LED2 control

BKL = 0 ³ LED2 de−activated

BKL = 1 ³ LED2 activated

BKL0: = LED1 control

BKL = 0 ³ LED1 de−activated

BKL = 1 ³ LED1 activated

RESET

B7

RESET

0

B6

CPFL

0

B5

SELFL

0

B4

I2CTRG

0

B3

EXTRG

0

B2

CPACT

0

B1

SACT

0

B0

ENIND

0

RESET:

B7 = 1 ³ unconditionally clear all the registers to their

respective zero state.

CPFL:

B6 = 0 ³ the charge pump is de−activated when a power

flash sequence is on going

B6 = 1 ³ the charge pump is fully active during a power

flash sequence.

SELFL:

B5 = 0 ³ the Torch / Video mode is engaged, the flash

cannot be fired, the ILED current is limited to

100 mA/LED.

B5 = 1 ³ the Flash mode is engaged, the flash can be fired.

I2CTRG:

B4 = 0 ³ when an I2C flash sequence is on going, the

flash is immediately stopped by this I2C command.

B4 = 1 ³ The flash is immediately launched by the I2C

when this bit is High, unless the EXTRG bit is high. In this

case, the external Trigger pulse has the highest priority.

EXTRG:

B3 = 0 ³ The TRGFL pin is de−activated, the flash can

be launched by the I2C port only

B3 = 1 ³ The Photo Flash sequence is activated by the

positive going pulse applied to the TRGFL pin, the duration

of the Flash Pulse being identical to the TRGFL pulse

width. The Time out is activated. The two LED are

simultaneously powered, unless one of the two LED is not

activated, according to the CONFIG0 register setup.

CPACT:

B2 = 0 ³ the charge pump is de−activated

B2 = 1 ³ the NCP5680 and the Charge Pump are active.

The Vout voltage is equal to the programmed value stored

into VOUTREG register. All the LED are biased as defined

in the previous or next programming sequence. A flash can

be launched.

SACT:

B1 = 0 ³ the NCP5680 is active, but the pre−charge is

de−activated. If the CPACT is Low, the Vout voltage will

be low. If the CPACT bit is High, then the Vout voltage will

be equal to the programmed value.

B1 = 1 ³ the NCP5680 is active, the pre−charge is

activated. The Vout voltage is equal to the Vbat voltage,

unless the Charge pump is activated (CPACT = 1). All the

LED are biased as defined in the previous or next

programming sequence. A power limited flash can be

launched.

ENIND:

B0 = 0 ³ the Indicator function is de−activated

B0 = 1 ³ the Indicator function is activated.

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