MX118 Просмотр технического описания (PDF) - Unspecified
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MX118 Datasheet PDF : 7 Pages
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Pin Function Chart
MX118
Pin
1
Function
Xtal: This is the output of the clock oscillator inverter.
2
No Connection.
3
C1 Filter Output: This is the output of the channel 1 input filter. It should be coupled to pin 4 (C1
Balanced Modulator Input) by a 1.0 µF cap. See Figure 3.
4
C1 Balanced Modulator Input: This is the input to the channel 1 balanced modulator. Internally
biased at VDD/2, it should be coupled to pin 3 (C1 Filter Output) by capacitor C2.
5
VSS: Negative supply (GND).
6
C1 Output: This is the analog output of channel 1. It is internally biased at VDD/2.
7
C1 Gain Amp Output: This is the output pin of the channel 1 gain adjusting op-amp. See Figure 4
for test gain setting components.
8
C1 Input: This is the analog signal input to channel 1. This input is to a gain adjusting op-amp whose
gain is set by internal components. See Figure 4.
9
C2 Input: This is the analog signal input to channel 2. This input is to a gain adjusting op-amp whose
gain is set by internal components. See Figure 4.
10 C2 Gain Amp Output: This is the output pin of the channel 2 gain adjusting op-amp. See Figure 4
for test gain setting components.
11
C2 Output: This is the analog output of channel 2. It is internally biased at VDD/2.
12
VBIAS: This is the analog bias line at VDD/2. It should be coupled to VSS by a 1.0 µF or greater
capacitor. See Figure 3.
13 C2 Balanced Modulator Input: This is the input to the channel 2 balanced modulator. Internally
biased at VDD/2, it should be coupled to pin 14 (C2 Filter Output) by capacitor C7.
14 C2 Filter Output: This is the output of the channel 1 input filter. It should be coupled to pin 13 (C2
Balanced Modulator Input) by a 1.0 µF capacitor. See Figure 3.
15
VDD: Positive supply of 3.0 V to 5.5 V.
16 Xtal/Clock: 4.433619 MHz or an externally derived clock is injected at this pin. (See Figure 3.)
MX-COM, INC.
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