MT88E43 Просмотр технического описания (PDF) - Zarlink Semiconductor Inc

Номер в каталоге

Компоненты Описание

Список матч

MT88E43

Extended Voltage Calling Number Identification Circuit 2

Zarlink Semiconductor Inc 

MT88E43B

Data Sheet

MT88E43

VDD

St/GT

C

VD=diode forward voltage

R1

R2

ESt

(a) tGP > tGA

tGP = R1C ln [VDD/(VDD-VTGt)]

tGA = RPC ln [(VDD-VD(RP/R2))/(VTGt-VD(RP/R2))]

RP = R1R2/(R1+R2)

MT88E43

VDD

St/GT

C

VD=diode forward voltage

R1

R2

ESt

(b) tGP < tGA

tGP = RPC ln [VDD-VD(RP/R2))/(VDD-VTGt-VD(RP/R2))]

tGA = R1C ln (VDD/VTGt)

RP = R1R2/(R1+R2)

Figure 5 - Guard Time Circuits with Unequal Times

Input Configuration

The MT88E43 provides an input arrangement comprised of an operational amplifier and a bias source (VRef); which

is used to bias the opamp inputs at VDD/2. The feedback resistor at the opamp output (GS) can be used to adjust

the gain. In a single-ended configuration, the opamp is connected as shown in Figure 6. For a differential input

configuration, Figure 7 shows the necessary connections.

IN+

C

RIN

IN-

RF

GS

Voltage Gain

(AV) = RF / RIN

VRef

Figure 6 - Single-Ended Input Configuration

8

Zarlink Semiconductor Inc.

Share Link: