MSM7662 Просмотр технического описания (PDF) - Oki Electric Industry
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MSM7662 Datasheet PDF : 62 Pages
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¡ Semiconductor
PEDL7662-02
MSM7662
PIN DESCRIPTIONS (continued)
Pin
Symbol Type
Description
Status signal output
Selected by internal register OMR[0]
81
STATUS[3] O OMR[0]: 0 FIFO overflow detection (default)
0: non-detection, 1: detection
OMR[0]: 1 CSYNC output
Status signal output
Selected by internal register OMR[1]
OMR[1]: 0 NTSC-PAL recognition (default)
82
STATUS[2] O
0: NTSC, 1: PAL
OMR[1]: 1 HLOCK sync detection output
0: non-detection, 1: detection
VBI interval multiplex signal detection output
83
STATUS[1] O
0: non-detection, 1: detection
84
M[7]
O Field memory control signal; RE output
85
M[6]
O Field memory control signal; WE output
86
M[5]
O Field memory control signal; RSTR output
87
M[4]
O Field memory control signal; RSTW output
88
M[3]
O Test output pin, normally "L" output
I2C-bus slave address select
89
M[2]
I 0: 1000001X
1: 1000011X (no internal pull-up or pull-down resistor)
Pin for setting by either external pin or internal register in order to select
analog unit gain value (MGC) and video signal input pin.
(no internal pull-up or pull-down resistor)
0: external pin mode
90
M[1]
I
Gain value setting: pins 94 to 96 (GAINS[2:0]) are used
Input pin setting: pins 97 to 99 (INS[2:0]) are used
1: register mode
Gain value setting: register ADC2[6:4]
Input pin setting: register ADC1[2:0]
Internal register setting is invalid when external pin mode is set.
Selection of external field memory control signal output
If field memory is not used, set M[0] to 0.
91
M[0]
I
0: M[7:4] outputs are invalid
1: M[7:4] outputs are valid
92
DGND
— Digital ground
93
DVDD
— Digital power supply
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