MSM7541RS Просмотр технического описания (PDF) - Oki Electric Industry

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MSM7541RS

Single Rail CODEC

Oki Electric Industry 

¡ Semiconductor

MSM7541/7542

,
TIMING DIAGRAM

PCM Data Input/Output Timing

Transmit Timing

BCLOCK

tXS

1

2

3

tSX

4

5

6

7

8

9

10

11

XSYNC

tWS

tXD1

tSD

tXD2

tXD3

PCMOUT

MSD D2

D3

D4

D5

D6

D7

D8

,
When tXS £ 1/2 • Fc, the Delay of the MSD bit is defined as tXD1.

When tSX £ 1/2 • Fc, the Delay of the MSD bit is defined as tSD.

Receive Timing

BCLOCK

tRS

RSYNC

1

2

3

4

5

6

7

tSR

tWS

8

9

tDS

tDH

PCMIN

MSD D2

D3

D4

D5

D6

D7

D8

10

11

15/20

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