MSM6789L Просмотр технического описания (PDF) - Oki Electric Industry
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MSM6789L Datasheet PDF : 53 Pages
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MSM6789A/6789L
¡ Semiconductor
PIN DESCRIPTIONS (for MSM6789A (5 V Version)) (Continued)
Pin Symbol Type
Description
• When serial register is selected (DRAM/SR = Low level)
MSEL2
MSEL1
RSEL2
RSEL1
Memory capacity
L
L
L
L
4M ¥ 1
L
L
L
H
4M ¥ 2
56 RSEL1
I
L
L
H
L
57 RSEL2
I
L
L
H
H
L
H
L
L
4M ¥ 3
4M ¥ 4
8M ¥ 1
L
H
L
H
8M ¥ 2
L
H
H
L
8M ¥ 3
L
H
H
H
8M ¥ 4
87
34
62
60
91
92
37
61
9-12
13-20
21
17-20
22
23
8
LOWPWR I
MCUM
I
RESET
I
PDWN
I
XT
I
XT
O
TEST
TEST
I
TMD3-TMD0
TDT7-TDT0 I/O
SYNC
TDT3-TDT0
I/O
[DQ4]-[DQ1]
TST
TCK
I
TMD4
This pin selects CAS-before-RAS refresh period of DRAM at the time of
power down when DRAM is selected.
Low level : 15 µs max.
High level : 125 µs max.
Mode Selection.
Low level : Stand-alone mode
High level : Microcontroller interface mode
A high input level causes the MSM6789A to be initialized and to go into the power
down state.
Power Down. When a low level is input, the MSM6789A goes to the power down
state. Unlike the RESET pin, this pin does not force the MSM6789A to be reset.
When a Low level is applied to this pin during recording operation, the MSM6789A
is halted, and will be maintained in the power down state while PDWN is low level.
After this pin is restored to a high level, postprocessing for recording will be performed.
Oscillator Connection. When an external clock is used, input the clock through
this pin. During the power down state, this pin must be set to the ground level.
Oscillator Connection. When an external clock is used, this pin must be left
open.
MSM6789A Test. Input a low level to the TEST pin and a high level to the TEST pin.
MSM6789A Test. This pin must be left open.
Connect these pins to DQ1-DQ4 of DRAM at the time of 4-bit ¥ type DRAM
selection. Otherwise these pins must be left open as they are MSM6789A test pins.
MSM6789A Test. Input a low level signal.
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