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MSM5265 Просмотр технического описания (PDF) - Oki Electric Industry

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MSM5265
OKI
Oki Electric Industry OKI
MSM5265 Datasheet PDF : 18 Pages
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¡ Semiconductor
MSM5265
• VLC2
Supply voltage pin for the 80 sets of LCD drivers. The input level to this pin should be the low
level output voltage of segment outputs (SEG1 to SEG80) and common outputs (COM-A,
COM-B).
In this case, the high level of segment outputs and common outputs is the VDD level, while
low level of segment outputs and common outputs is VLC2 level. VLC2 should be set at higher
level than ground level.
• VLC1
Supply voltage pin for the middle level voltage of the common outputs. The input level of this
pin is the middle level output voltage of the common outputs (COM-A, COM-B) in the 1/2
duty dynamic display mode.
The value of VLC1 is calculated by the following formula:
VLC1 = (VDD + VLC2)/2
In the static display mode, this pin should be open.
• COM-A, COM-B
LCD driving common signals are output from these pins. These pins should be connected to
the common side of the LCD panel.
– In the static display mode
A pulse in phase with the COM-OUT output is output from both COM-A and COM-B. In
this case, the high level is VDD, and the low level is VLC2.
– In the 1/2 duty dynamic display mode
The COM-A and COM-B output signals are alternately changed within each COM-OUT
output cycle, resulting in alternate repetition of select and non-select modes.
In the select mode, a signal in phase with the COM-OUT signal is output at "H" (VDD) and
"L" (VLC2).
In the non-select mode, a voltage is output at "M" (VLC1). In the select mode of COM-A
(non-select mode of COM-B), signals that correspond to the 1st- to 80th-bit data of the data
latch are output to the segment outputs.
In the select mode of COM-B (non-select mode of COM-A), signals that correspond to the
81st- to 160th-bit data of the data latch are output to the segment outputs.
Dynamic display mode
(D/S : "H")
Static display mode
(D/S : "L")
COM-OUT
COM-A
COM-B
VDD
VLC1
VLC2
VDD
VLC1
VLC2
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