ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
EN, IN1, IN2
(GIN)
tPLH
(tSON)
OUT1, OUT2
(GOUT)
50%
90%
10%
(tStPOHFLF)
Figure 5. tPLH, tPHL, and tPZH Timing
Table 6. Truth Table
INPUT
EN
IN1
IN2
H
H
H
H
H
L
H
L
H
H
L
L
L
X
X
H
X
X
H
X
X
H = High.
L = Low.
Z = High impedance.
X = Don’t care.
VDDDETON 2.5 V/3.5 V
VDD
0.8 V/
1.5 V
t
VDDDET
50%
VDDDETOFF
t
VDDDET
90%
IM
0%
(<1.0 µA)
Figure 6. Low-Voltage Detection
OUTPUT
GIN
OUT1
OUT2
GOUT
X
L
L
X
X
H
L
X
X
L
H
X
X
Z
Z
X
X
L
L
L
H
X
X
L
L
X
X
H
17511A
8
Analog Integrated Circuit Device Data
Freescale Semiconductor