MN86074 Просмотр технического описания (PDF) - Panasonic Corporation

Номер в каталоге

Компоненты Описание

Список матч

MN86074

Image Processing LSI

Panasonic Corporation 

MN86074

For Communications Equipment

Line density correction in secondary scanning direction

• Three-line OR processing (for line density

conversion in secondary scanning direction from 7.7

line/mm to 3.85)

Clock inputs

· Image clock × 16

· Image clock × 8

Sensor interfaces

• CCD sensor

Generates the following drive signals: FSH

(øSH), FCK1, 2 (ø1, 2), FR (øR), FSP (øSP)

• Contacting image sensor

Generates the following drive signals: FSH

(SI), FSP (CLK).

FSP (CLK): 75% or 87.5%.

Memory interfaces

• Line lengths up to 2048 pixels 64-Kbit SRAM

×1

• Line lengths of 2049 to 4096 pixels

64-Kbit SRAM

×2

or 256-Kbit SRAM

×1

• Line lengths of 4097 to 8192 pixels

256-Kbit SRAM

×1

Image bus interface

• Serial mode with request (VREQ) input and enable

(VSEN), clock (VSCK), and data (VSDA) outputs

Scanning modes

• Free scanning

• Cycle scanning

System interface

• Interface to 8-bit microprocessors (Intel format)

Image data I/O function

• Image data output after shading correction (8 bits)

• Image data output after multivalue smoothing (6 bits)

• Image data input sent from external A/D converter

(8 bits)

Output ports

• 8 pins (pins double as image data I/O pins)

Mechanism drive interface

• User-defined timing pulse output

Power supply

• Digital circuits, DVDD: 5.0 V

• Analog circuits, AVDD: 5.0 V

• A/D converter reference voltages

VREFH: 5.0 to 3.0V

VREFL: 2.0 to 0.0V

Applications

Facsimile equipment

Share Link: