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MM74C157

Quad 2-Input Multiplexers

Fairchild Semiconductor 

October 1987

Revised January 1999

MM74C157

Quad 2-Input Multiplexers

General Description

The MM74C157 multiplexers are monolithic complemen-

tary MOS (CMOS) integrated circuits constructed with N-

and P-channel enhancement transistors. They consist of

four 2-input multiplexers with common select and enable

inputs. When the enable input is at logical “0” the four out-

puts assume the values as selected from the inputs. When

the enable input is at logical “1”, the outputs assume logical

“0”. Select decoding is done internally resulting in a single

select input only.

Features

s Supply voltage range: 3V to 15V

s High noise immunity: 0.45 VCC (typ.)

s Low power: 50 nW (typ.)

s Tenth power TTL compatible: Drive 2 LPTTL loads

Ordering Code:

Order Number Package Number

Package Description

MM74C157N

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Connection Diagram

Logic Diagram

Pin Assignments for DIP

Top View

Truth Table

Enable

Select

A

B Output Y

1

X

X

X

0

0

0

0

X

0

0

0

1

X

1

0

1

X

0

0

0

1

X

1

1

© 1999 Fairchild Semiconductor Corporation DS005894.prf

www.fairchildsemi.com

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