ML4895
PIN CONFIGURATION
ML4895
8-Pin SOIC (S08)
VREG
VFB
ISENSE
SHDN
1
8
2
7
3
6
4
5
TOP VIEW
VIN
P DRV
N DRV
GND
PIN DESCRIPTION
PIN# NAME
1 VREG
2 VFB
3 ISENSE
4 SHDN
FUNCTION
Connection point for internal linear
regulator bypass capacitor
Programming pin for setting the
output voltage
Current sense input
a logic low on this pin shuts down the
regulator and all internal bias
circuitry for minimum power
consumption
PIN# NAME
5 GND
6 N DRV
7 P DRV
8 VIN
FUNCTION
Analog signal ground
NMOS driver output
PMOS driver output
Battery input voltage
2