MK1491-06
AMD Geode™ Clock Source
Power Down Control Table
PCISTP# PWRDWN# SLOW# MODE PCI
X
0
X
Power down LOW
0
1
X
PCI STOP LOW
1
1
X
ON
ON
PCIF
LOW
ON
ON
24/14.3
LOW
ON
ON
14.3
LOW
ON
ON
Description
All outputs low. PLL’s
and oscillators off.
PCI clocks
synchronously enter
and leave low state.
All clocks on.
Key: 1 = connected to VDD, 0 = connected to ground, X = any valid logic level, combination inputs/outputs
should be connected to VDD or ground through a 10 kΩ resistor as shown below.
Power-on Default Conditions
Pin #
5
8
10
12
13
15
16
21
22
28
Function
TS
SEL AUDIO
SLOW#
FS
SEL 24
PWRDWN#
PCISTP#
LE#
EPCI#
PEN
Default
Condition
M All outputs enabled.
M Audio clock (pin 28) set to 24.576 MHz
1
PCI clocks set to 33.3 MHz. Refer to Power Down Control Table above.
1
PCI frequency = 33.3 MHz.
1
24M/14.3M (pin 19) set to 24 MHz.
1
All clocks running.
1
PCI clocks running.
1
Low EMI function OFF
1
Pin 22 set to normal PCI signal (not early).
M PCI (pin 25) set to PCI clock (33.33 MHz). PCI (pin 24) set to PCIF clock
(33.33 MHz).
MDS 1491-06 J
4
Revision 110204
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com