MCM6709BRJ7R Просмотр технического описания (PDF) - Motorola => Freescale
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MCM6709BRJ7R Datasheet PDF : 7 Pages
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WRITE CYCLE 2 (E Controlled, See Notes 1 and 2)
MCM6709BR–6 MCM6709BR–7 MCM6709BR–8
Parameter
Symbol
Min
Max
Min
Max
Min
Max Unit Notes
Write Cycle Time
Address Setup Time
Address Valid to End of Write
Chip Enable to End of Write
tAVAV
6
—
7
—
8
—
ns
3
tAVEL
0
—
0
—
0
—
ns
tAVEH
6
—
7
—
8
—
ns
tELEH,
5
—
6
—
7
—
ns
4, 5
tELWH
Data Valid to End of Write
tDVEH
3
—
3.5
—
3.5
—
ns
Data Hold Time
tEHDX
0
—
0
—
0
—
ns
Write Recovery Time
tEHAX
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. All write cycle timing is referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high impedance condition.
5. If E goes high coincident with or before W goes high, the output will remain in a high impedance condition.
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 2
tAVAV
tAVEH
tELEH
tAVEL
tELWH
tDVEH
DATA VALID
HIGH–Z
tEHAX
tEHDX
Motorola Memory Prefix
Part Number
ORDERING INFORMATION
(Order by Full Part Number)
MCM 6709BR X X X
Full Part Numbers — MCM6709BRJ6
MCM6709BRJ7
MCM6709BRJ8
Shipping Method (R = Tape and Reel, Blank = Rails)
Speed (6 = 6 ns, 7 = 7 ns, 8 = 8 ns)
Package (J = 300 mil SOJ)
MCM6709BRJ6R
MCM6709BRJ7R
MCM6709BRJ8R
MCM6709BR
6
MOTOROLA FAST SRAM
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