MCM6706B Просмотр технического описания (PDF) - Motorola => Freescale
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MCM6706B Datasheet PDF : 7 Pages
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WRITE CYCLE 1 (W Controlled, See Notes 1 and 2)
MCM6706B–8 MCM6706B–10 MCM6706B–12
Parameter
Symbol Min Max Min Max Min Max Unit Notes
Write Cycle Time
Address Setup Time
Address Valid to End of Write
Write Pulse Width
tAVAV
8
tAVWL
0
tAVWH
8
tWLWH,
8
tWLEH
—
10
—
12
—
ns
3
—
0
—
0
—
ns
—
9
—
10
—
ns
—
9
—
10
—
ns
Data Valid to End of Write
tDVWH
4
—
5
—
6
—
ns
Data Hold Time
tWHDX
0
—
0
—
0
—
ns
Write Low to Data High–Z
tWLQZ
—
4
—
5
—
6
ns 4, 5, 6
Wirte High to Output Active
tWHQX
3
—
3
—
3
—
ns 4, 5, 6
Write Recovery Time
tWHAX
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivites to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. All write cycle timings are referenced from the last valid address to the first transitioning address.
4. Transition is measured 200 mV from steady–state voltage with load of Figure 1b.
5. Parameter is sampled and not 100% tested.
6. At any given voltage and temperature, tWLQZ max is < tWHQX min both for a given device and from device to device.
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 1
tAVAV
tAVWL
HIGH–Z
tWLQZ
tAVWH
tWLEH
tWLWH
tDVWH
DATA VALID
HIGH–Z
tWHAX
tWHDX
tWHQX
MOTOROLA FAST SRAM
MCM6706B
5
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