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MC74LCX16500

Low–Voltage CMOS 18–Bit Universal Bus Transceiver

Motorola => Freescale 

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Low-Voltage CMOS 18-Bit

Universal Bus Transceiver

With 5V-Tolerant Inputs and Outputs

(3-State, Non-Inverting)

MC74LCX16500

The MC74LCX16500 is a high performance, non–inverting 18–bit

universal bus transceiver operating from a 2.7 to 3.6V supply. This part is

not byte controlled; it is “18–bit” controlled. High impedance TTL

compatible inputs significantly reduce current loading to input drivers

while TTL compatible outputs offer improved switching noise

performance. A VI specification of 5.5V allows MC74LCX16500 inputs to

be safely driven from 5V devices. The MC74LCX16500 is suitable for

memory address driving and all TTL level bus oriented transceiver

applications.

Data flow in each direction is controlled by Output Enable (OEAB,

OEBA), Latch Enable (LEAB, LEBA) and Clock inputs (CAB, CBA). When

LEAB is HIGH, the A–to–B dataflow is transparent. When LEAB is LOW,

and CAB is held at LOW or HIGH, the data A is latched; on the

HIGH–to–LOW transition of CAB the A–data is stored in the

latch/flip–flop. The outputs are active when OEAB is HIGH. When OEAB

is LOW the B–outputs are in 3–state. Similarly, the LEBA, OEBA and CBA

control the B–to–A dataflow. Please note that the output enables are

complementary; OEAB is active HIGH, OEBA is active LOW.

• Designed for 2.7 to 3.6V VCC Operation

• 6ns Maximum tpd

• 5V Tolerant — Interface Capability With 5V TTL Logic

• Supports Live Insertion and Withdrawal

• IOFF Specification Guarantees High Impedance When VCC = 0V

• LVTTL Compatible

• LVCMOS Compatible

• 24mA Balanced Output Sink and Source Capability

• Near Zero Static Supply Current in All Three Logic States (20µA)

Substantially Reduces System Power Requirements

• Latchup Performance Exceeds 500mA

• ESD Performance: Human Body Model >2000V; Machine

Model >200V

LOW–VOLTAGE CMOS

18–BIT UNIVERSAL BUS

TRANSCEIVER

DT SUFFIX

56–LEAD PLASTIC TSSOP PACKAGE

CASE 1202–01

PIN NAMES

Pins

OEAB, OEBA

CAB, CBA

LEAB, LEBA

A0–A17

B0–B17

Function

Output Enable Inputs

Clock Pulse Inputs

Latch Enable Inputs

Side A Inputs/Outputs

Side B Inputs/Outputs

3/97

© Motorola, Inc. 1997

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