F497 Просмотр технического описания (PDF) - Fujitsu

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F497

16-bit Proprietary Microcontroller

Fujitsu 

MB90495 Series

14.9 UART1 Timing

Parameter

Serial clock cycle time

Symbol Pin Symbol

tSCYC

SCK1

(TA = –40 to +85°C, VCC = 4.5 to 5.5 V, VSS = 0 V)

Test Condition

Rated Value

Units Remarks

Min. Max.

8 tCP

—

ns

SCK ↓ ⇒ SOT delay time

Valid SIN ⇒ SCK ↑

tSLOV SCK1, SOT1 Internal clock operation

–80 80

ns

output pins are CL = 80 pF

tIVSH

SCK1, SIN1 + 1 TTL.

100 —

ns

SCK ↑ ⇒ Valid SIN hold time

tSHIX

SCK1, SIN1

60

—

ns

Serial clock "H" pulse width

tSHSL

SCK1

4 tCP

—

ns

Serial clock "L" pulse width

SCK ↓ ⇒ SOT delay time

Valid SIN ⇒ SCK ↑

tSLSH

SCK1

4 tCP

—

ns

External clock operation

tSLOV SCK1, SOT1 output pins are CL = 80 pF

—

150

ns

+ 1 TTL.

tIVSH

SCK1, SIN1

60

—

ns

SCK ↑ ⇒ Valid SIN hold time

tSHIX

SCK1, SIN1

60

—

ns

Notes:

1. AC characteristic in CLK synchronized mode.

2. CL is load capacity value of pins when testing.

3. tCP is the machine cycle (Unit: ns).

SCK

SOT

SIN

0.8 V

tSLOV

tSCYC

2.4 V

2.4 V

0.8 V

tIVSH

0.8 VCC

0.2 VCC

0.8 V

tSHIX

0.8 VCC

0.2 VCC

Figure 14.10 Internal Shift Clock Mode

MB90495 Series Data Sheet (Advance Information) 33 / 40

FME EMDC June 19, 2000

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