4-Port LVDS and LVTTL-to-LVDS Repeaters
Test Circuits and Timing Diagrams (continued)
MAX9169
1.25V
CL
10pF
IN+
1.20V
1.25V
IN-
CL
1.20V
10pF
PULSE EN_
GENERATOR
50Ω
OUT_+
50Ω
50Ω
1.2V
OUT_-
Figure 16. MAX9169 Enable and Disable Time Test Circuit
MAX9170
CL
10pF
2.0V
IN
0.8V
CL
10pF
PULSE
EN_
GENERATOR
50Ω
Figure 17. MAX9170 Enable and Disable Time Test Circuit
OUT_+
50Ω
50Ω
1.2V
OUT_-
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