MAX887HC Просмотр технического описания (PDF) - Maxim Integrated
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MAX887HC Datasheet PDF : 12 Pages
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100% Duty Cycle, Low-Noise,
Step-Down, PWM DC-DC Converter
______________________________________________________________Pin Description
PIN NAME
FUNCTION
1
SHDN Shutdown, Active-Low, Logic-Level Input. Connect SHDN to V+ for normal operation.
2
FB
Feedback Input. Connect FB to a resistor voltage divider between the output and GND.
3
REF
Reference Bypass Output. Connect a 0.047µF capacitor to GND very close to the MAX887, within 0.2 in. (5mm).
4
VL
3.3V Internal Logic Regulator Output. Bypass VL to GND with a 2.2µF capacitor very close to the MAX887,
within 0.2 in. (5mm).
5
GND Ground
Oscillator Synchronization and PWM Control Input. SYNC is a logic-level input. Tie SYNC to VL for internal
6
SYNC
300kHz PWM operation at all loads. The oscillator synchronizes to the negative edge of an external clock
between 10kHz and 400kHz. The MAX887 operates in PWM mode when SYNC is clocked. Tying SYNC to
GND allows a reduced supply-current mode at light loads.
7
LX
Inductor Connection to the drain of an internal P-channel MOSFET
Supply-Voltage Input. 3.5V min to 11V max. Bypass V+ to GND with a 0.33µF and large-value electrolytic
8
V+
capacitor in parallel. These capacitors must be as close to the V+ and GND pins as possible. Place the
0.33µF capacitor within 0.2 in. (5mm) of the MAX887.
SHDN
VL
REF
V+
VL
REF
GND
GND
PFM CURRENT COMPARATOR
25mV
100mV
ILIM COMPARATOR
SYNC
RAMP
GEN
SLOPE COMPENSATION
SYNC
CELL
FROM CONTROL LOGIC
FB
PWM
REF
PWM
COMPARATOR
LEVEL
SHIFTER
V+
1Ω
0.1X
LX
SENSE FET
CONTROL &
DRIVER LOGIC
SENSE FET
0.1X
FB
REF
PWM ON
SIGNAL
50mV
FB
PFM
REF
COMPARATOR
OVERVOLTAGE
COMPARATOR
NEGLIM
COMPARATOR
0mV in PFM
ADJ. IN PWM
1Ω
GND
Figure 1. Simplified Functional Block Diagram
_______________________________________________________________________________________ 7
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