GLT6100L08LL-85TS Просмотр технического описания (PDF) - G-Link Technology

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GLT6100L08LL-85TS

Ultra Low Power 128k x 8 CMOS SRAM

G-Link Technology  

G-LINK

GLT6100L08

Ultra Low Power 128k x 8 CMOS SRAM

Nov 2000(Rev. 02)

Timing Waveform of Read Cycle 1 (3,6,7,9) (Address Controlled)

Address

tRC

tAA

tOH

DOUT

Data Valid

Timing Waveform of Read Cycle 2 (5,6,8,9) ( CE1 Controlled)

CE1

tRC

OE

tOE

tACE

tOLZ

tOHZ

tCHZ

DOUT

tCLZ

Data Valid

tPD

tPU

ICC

Supply Current

50%

50%

ISB

Timing Waveform of Read Cycle 1 (3,6,8,9) (CE2 Controlled)

tRC

CE2

OE

tOE

tACE

tOLZ

tOHZ

tCHZ

DOUT

tCLZ

Data Valid

tPD

tPU

ICC

Supply Current

50%

50%

ISB

G-Link Technology Corporation

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Santa Clara, CA 95051, U.S.A.

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G-Link Technology Corporation, Taiwan

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Industrial Park, Hsin Chu, Taiwan.

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