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M37640E8FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Mitsumi 

Ver 1.4

MITSUBISHI MICROCOMPUTERS

7640 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

1.5 PIN DESCRIPTION AND LAYOUT

Table 1.1. Pin Description and Layout

NAME

P00/AB0~ P17/AB15

P20/DB0 ~ P27/DB7

P30/RDY

P31

P32

P33/DMAout

P34/Φout

P35/SYNCout

P36/WR

P37/RD

P40/EDMA

P41/INT0~ P42/INT1

P43/CNTR0

P44/CNTR1

P50/XCin

P51/Tout/XCout

P52/OBF0

P53/IBF0

P54/S0

P55/A0

P56/R(E)

P57/W(R/W)

P60/DQ0~ P67/DQ7

I/O

DESCRIPTION

I/O CMOS I/O port (address bus). When the MCU is in memory expansion or

microprocessor mode, these pins function as the address bus.

I/O CMOS I/O port (data bus). When the MCU is in memory expansion or microprocessor

mode, these pins function as the data bus. These pins may also be used to implement

the Key-on Wake up function.

I/O CMOS I/O port (Ready). When the MCU is in memory expansion or microprocessor

mode, this pin functions as RDY (hardware wait cycle control).

I/O CMOS I/O port.

I/O CMOS I/O port.

CMOS I/O port (DMAout). When the MCU is in memory expansion or microprocessor

I/O mode, this pin is set to a “1” during a DMA transfer.

I/O CMOS I/O port. When the MCU is in memory expansion or microprocessor mode,

this pin becomes Φout pin.

I/O CMOS I/O port (SYNCout). When the MCU is in memory expansion or

microprocessor mode, this pin becomes the SYNCout pin.

CMOS I/O port. (WR output). When the MCU is in memory expansion or microprocessor

I/O mode, this pin becomes WR.

CMOS I/O port. (RD output). When the MCU is in memory expansion or microprocessor

I/O mode, this pin becomes RD.

I/O CMOS I/O port (EDMA: Expanded Data Memory Access). When the MCU is in memory

expansion or microprocessor mode, this pin can become the EDMA pin.

I/O CMOS I/O port or external interrupt ports INT0 and INT1. These external interrupts can

be configured to be active high or low.

I/O CMOS I/O port or Timer X input pin for pulse width measurement mode and event

counter mode or Timer X output pin for pulse output mode. This pin can also be used as

an external interrupt when Timer X is not in output mode. The interrupt polarity is

selected in the Timer X mode register.

CMOS I/O port or Timer Y input pin for pulse period measurement mode, pulse H-L

I/O measurement mode and event counter mode or Timer Y output pin for pulse output

mode. This pin can also be used as an external interrupt when Timer Y is not in output

mode. The interrupt polarity is selected in the Timer Y mode register.

I/O CMOS I/O port or XCin.

I/O CMOS I/O port or Timer half pulse output pin (can be configured initially high or initially

low), or XCout.

I/O CMOS I/O port or OBF0 output to master CPU for data bus buffer 0.

I/O CMOS I/O port or IBF0 output to master CPU for data bus buffer 0.

I/O CMOS I/O port or S0 input from master CPU for data bus buffer 0.

I/O CMOS I/O port or A0 input from master CPU.

I/O CMOS I/O port or R(E) input from master CPU.

I/O CMOS I/O port or W(R/W) input from master CPU.

I/O CMOS I/O port or master CPU data bus.

USB D-

USB D+

P70/SOF

P71/HOLD

P72/S1

I/O USB D- voltage line interface, a series resistor of 33 Ω should be connected to this pin.

I/O USB D+ voltage line interface, a series resistor of 33 Ω should be connected to this pin.

I/O CMOS I/O port or USB start of frame pulse output, an 80 ns pulse outputs on this pin for

every USB frame.

I/O CMOS I/O port or HOLD pin.

I/O CMOS I/O port or S1 input from master CPU for data bus buffer 1.

PIN #

56-41

64-57

40

39

38

37

36

35

34

33

24

23-22

21

20

12

11

8

7

6

5

4

3

2-1,

80-75

71

70

69

68

67

3

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