M30221 Просмотр технического описания (PDF) - Renesas Electronics

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M30221

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Renesas Electronics 

Memory

Mitsubishi microcomputers

M30221 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Operation of Functional Blocks

The M30221 group accommodates certain units in a single chip. These units include ROM and RAM to

store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.

Also included are peripheral units such as timers, real time port, serial I/O, LCD drive control circuit, D-A

converter, A-D converter, DMAC and I/O ports.

Memory

Figure 1.4.1 is a memory map of the M30221 group. The address space extends the 1M bytes from ad-

dress 0000016 to FFFFF16. From FFFFF16 down is ROM. For example, in the M30221M3-XXXFP, there is

24K bytes of internal ROM from FA00016 to FFFFF16. The vector table for fixed interrupts such as the reset

_______

and NMI are mapped to FFFDC16 to FFFFF16. The starting address of the interrupt routine is stored here.

The address of the vector table for timer interrupts, etc., can be set as desired using the internal register

(INTB). See the section on interrupts for details.

From 0040016 up is RAM. For example, in the M30221M3-XXXFP, 1.5K bytes of internal RAM is mapped

to the space from 0040016 to 009FF6. In addition to storing data, the RAM also stores the stack used when

calling subroutines and when interrupts are generated.

The SFR area is mapped to 0000016 to 003FF16. This area accommodates the control registers for periph-

eral devices such as I/O ports, A-D converter, serial I/O, timers, and LCD, etc. Figures 1.7.1 to 1.7.3 are

location of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and

cannot be used for other purposes.

The special page vector table is mapped to FFE0016 to FFFDB16. If the starting addresses of subroutines

or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions

can be used as 2-byte instructions, reducing the number of program steps.

RAM size

1.5K bytes

2K bytes

4K bytes

10K bytes

Address XXXXX16

009FF16

00BFF16

013FF16

02BFF16

ROM size

24K bytes

32K bytes

64K bytes

128K bytes

Address YYYYY16

FA00016

F800016

F000016

E000016

Figure 1.4.1. Memory map

0000016

SFR area

For details, see

Figures 1.7.1 to 1.7.3

0040016

Internal RAM area

XXXXX16

Internal RAM area

YYYYY16

FFFFF16

Internal ROM area

FFE0016

Special page

vector table

FFFDC16

Undefined instruction

Overflow

BRK instruction

Address match

Single step

Watchdog timer

DBC

NMI

FFFFF16

Reset

8

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