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M30240E7

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Mitsumi 

Preliminary Specifications REV. E

Specifications in this manual are tentative and subject to change

Mitsubishi microcomputers

M30240 Group

Central Processing Unit (CPU)

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

2.0 Operation of Functional Blocks

The M30240 group accommodates certain units in a single chip. These units include ROM and RAM to

store instructions and data, and the central processing unit (CPU) to execute arithmetic/logic operations.

Also included are peripheral units such as USB, timers, serial I/O, DMAC, CRC calculation circuit, A-D

converter, and I/O ports.

The following explains each unit.

2.1 Central Processing Unit (CPU)

The CPU has a total of 13 registers shown in Figure 1.5. Seven of these registers (R0, R1, R2, R3, A0,

A1, and FB) come in two sets; therefore, these have two register banks.

b15

b8 b7

R0(Note)

H

b0

L

b15

b8 b7

R1(Note)

H

b0

L

b15

b0

R2(Note)

Data

registers

b19

PC

b19

INTB H

b0

Program counter

b0

L

Interrupt table

register

b15

b0

R3(Note)

b15

USP

b0

User stack pointer

b15

A0(Note)

b15

A1(Note)

b15

FB(Note)

b0

Address

b0

registers

b0

Frame base

registers

b15

ISP

b15

SB

b15

FLG

b0

Interrupt stack

pointer

b0

Static base

register

b0

Flag register

IPL

U I OB S Z D C

Note: These registers consist of two register banks.

Figure 1.5: Central processing unit register

2.1.1 Data registers (R0, R0H, R0L, R1, R1H, R1L, R2, and R3)

Data registers (R0, R1, R2, and R3) are configured with 16 bits, and are used primarily for transfer

and arithmetic/logic operations.

1-11

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