M30201 Просмотр технического описания (PDF) - Mitsumi

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M30201

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Mitsumi 

Clock Generating Circuit

Mitsubishi microcomputers

M30201 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Clock Control

Figure 1.17 shows the block diagram of the clock generating circuit.

XCIN

CM04

XCOUT

RESET

Software reset

CM10 “1”

Write signal

SQ

R

Interrupt request

level judgment output

WAIT instruction

SQ

R

Sub clock

XIN

XOUT

Main clock

CM05

CM02

1/32 fC32

f1

fC

fAD

f8

f32

bc

a Divider d CM07=0

fC

CM07=1

BCLK

b

c

a

1/2

1/2

1/2

1/2

1/2

CM06=1

CM06=0

CM17,CM16=10

CM06=0

CM17,CM16=11

d

CM0i : Bit i at address 000616

CM1i : Bit i at address 000716

WDCi : Bit i at address 000F16

CM06=0

CM17,CM16=01

CM06=0

CM17,CM16=00

Details of divider

Figure 1.17. Clock generating circuit

19

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