M25PE80 Просмотр технического описания (PDF) - Numonyx -> Micron

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M25PE80

8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout

Numonyx -> Micron 

M25PE80

Description

Figure 1.

Logic diagram - previous T7Y Figure 2.

process

VCC

Logic diagram - new T9HX

process

VCC

D

C

S

TSL

Reset

Q

M25PE80

D

C

S

W

Reset

Q

M25PE80

VSS

AI10779

VSS

AI13557

Table 1. Signal names

Signal name

Function

Direction

C

Serial clock

Input

D

Serial data

Input

Q

Serial data

Output

S

TSL or W(1)

Chip select

Top sector lock or write protect

Input

Input

Reset

Reset

Input

VCC

Supply voltage

VSS

Ground

Input

1. In the previous T7Y process the pin is a top sector lock input whereas in the new T9HX process, the pin is

a write protect input (see Figure 1 and Figure 2).

Figure 3. VFQFPN, QFN8L and SO connections

M25PE80

S1

Q2

TSL or W 3

VSS 4

8 VCC

7 Reset

6C

5D

AI10780b

1. There is an exposed central pad on the underside of the MLP8 package. This is pulled, internally, to VSS,

and must not be allowed to be connected to any other voltage or signal line on the PCB.

2. See Package mechanical section for package dimensions, and how to identify pin-1.

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