M25PE40 Просмотр технического описания (PDF) - Numonyx -> Micron

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M25PE40

4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout

Numonyx -> Micron 

M25PE40

Description

Figure 1. Logic diagram - previous T7X Figure 2. Logic diagram - new T9HX

process

process

VCC

VCC

D

C

S

TSL

Reset

Q

M25PE40

D

C

S

W

Reset

Q

M25PE40

VSS

AI09704C

VSS

AI13781

Table 1. Signal names

Signal name

Function

Direction

C

Serial Clock

Input

D

Serial Data input

Input

Q

Serial Data output

Output

S

TSL or W(1)

Chip Select

Top Sector Lock or Write Protect

Input

Input

Reset

Reset

Input

VCC

Supply voltage

VSS

Ground

1. In the previous T7X process the pin is a Top Sector Lock input whereas in the new T9HX process, the pin

is a Write Protect input (see Figure 1 and Figure 2).

Figure 3. VFQFPN and SO connections

M25PE40

S1

Q2

TSL or W 3

VSS 4

8 VCC

7 Reset

6C

5D

AI09703d

1. There is an exposed central pad on the underside of the VFQFPN package. This is pulled, internally, to

VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB.

2. See Section 12: Package mechanical for package dimensions, and how to identify pin-1.

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