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LTC4308C

Low Voltage, Level Shifting Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery

Linear Technology 

LTC4308

OPERATION

When powering up into a bus stuck low condition, the

connection circuitry connecting the SDA and SCL pins are

not activated. 30ms after UVLO, automatic clocking and

stop bit generation takes place as described above.

READY Digital Output

This pin provides a digital flag which is low when either

ENABLE is low, the start-up sequence described earlier

in this section has not been completed, or the LTC4308

has disconnected the input and output busses due to a

bus stuck low condition. READY goes high when ENABLE

is high and start-up is complete. The pin is driven by an

open-drain pull-down device capable of sinking 3mA while

holding 0.4V on the pin. Connect a resistor to the bus

pull-up supply to provide the pull-up.

ENABLE

When the ENABLE pin is driven below 0.45V with respect

to the LTC4308’s ground, the input pin is disconnected

from the output pin and the READY pin is pulled low.

When the pin is driven above 0.75V, the part waits for

data transactions on both the input and output pins to be

complete (as described in the Start-Up section) before

connecting the two pins. At this time the internal pull-down

on READY releases.

A rising edge on ENABLE after a bus stuck low condition

has occurred forces a connection between SDAIN, SDAOUT,

and SCLIN, SCLOUT even if the bus stuck low condition

has not been cleared. At this time the 30ms timer is reset,

but not disabled.

Rise Time Accelerators

Once connection has been established, rise time accelera-

tor circuits on SDAOUT and SCLOUT are enabled. During

positive bus transitions of at least 0.8V/μs, the rise time

accelerators provide strong, slew-limited pull-up currents

to force the bus voltage to rise at a rate of 100V/μs.

The rise time accelerators significantly improve reli-

ability and performance in I2C systems in several ways.

First, due to the accelerator’s significantly lower pull-up

impedance, as compared to the bus pull-up resistance,

the system is less susceptible to noise on rising edges,

providing smooth, controlled transitions for both small

and large systems. Second, the accelerators allow users

to choose larger bus pull-up resistors, reducing power

consumption and improving logic low noise margins or

to design with bus capacitances beyond those specified

in the I2C specifications.

For these reasons, it is strongly recommended that users

choose bus pull-up resistors that guarantee the output

busses will rise on their own at a rate of at least 0.8 V/μs to

ensure activation of the accelerators. See the Applications

Information section for selecting pull-up resistor sizes.

It is important to connect SDAOUT and SCLOUT pins to

a bus whose pull-up supply is equal to or greater than

the LTC4308’s supply to ensure the accelerators do not

source current through the pull up resistors into the pull-

up supply.

The rise time accelerators are internally disabled until the

sequence of events described in the start-up section has

been completed, as well as during automatic clocking and

stop bit generation for a bus stuck low recovery event.

4308f

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