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LTC4306C Просмотр технического описания (PDF) - Linear Technology

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LTC4306C Datasheet PDF : 20 Pages
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LTC4306
U
OPERATIO
Control Register Bit Definitions
Register 0 (00h)
BIT NAME
TYPE* DESCRIPTION
d7 Downstream
Connected
R Indicates if upstream bus is connected
to any downstream buses
0 = upstream bus disconnected from
all downstream buses
1 = upstream bus connected to one or
more downstream buses
d6 ALERT1 Logic State R Logic state of ALERT1 pin, noninverting
d5 ALERT2 Logic State R Logic state of ALERT2 pin, noninverting
d4 ALERT3 Logic State R Logic state of ALERT3 pin, noninverting
d3 ALERT4 Logic State R Logic state of ALERT4 pin, noninverting
d2 Failed Connection
Attempt
R Indicates if an attempt to connect to a
downstream bus failed because the
“Connection Requirement” bit in
Register 2 was low and the
downstream bus was low
0 = Failed connection attempt occurred
1 = No failed attempts at connection
occurred
d1 Latched Timeout
R Latched bit indicating if a timeout has
occurred and has not yet been cleared.
0 = no latched timeout
1 = latched timeout
d0 Timeout Real Time
R Indicates real-time status of Stuck Low
Timeout Circuitry
0 = no timeout is occurring
1 = timeout is occurring
Note: Masters write to Register 0 to reset the fault circuitry after a fault
has occurred and been resolved. Because Register 0 is Read-Only, no
other functionality is affected.
* For Type, “R/W” = Read Write, “R” = Read Only
Register 1 (01h)
BIT NAME
TYPE* DESCRIPTION
d7 Upstream
Accelerators
Enable
R/W Activates upstream rise time
accelerator currents
0 = upstream rise time accelerator
currents inactive (default)
1 = upstream rise time accelerator
currents active
d6 Downstream
Accelerators
Enable
R/W Activates downstream rise time
accelerator currents
0 = downstream rise time accelerator
currents inactive (default)
1 = downstream rise time accelerator
currents active
d5 GPIO1 Output R/W GPIO1 output driver state,
Driver State
noninverting, default = 1
d4 GPIO2 Output R/W GPIO2 output driver state,
Driver State
noninverting, default = 1
d3-d2 Reserved
R Not Used
d1 GPIO1 Logic
State
R Logic state of GPIO1 pin,
noninverting
d0 GPIO2 Logic
State
R Logic state of GPIO2 pin,
noninverting
* For Type, “R/W” = Read Write, “R” = Read Only
4306f
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