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3575FE

Isolated Flyback Converter without an Opto-Coupler

Linear Technology 

LT3575

APPLICATIONS INFORMATION

Minimum Load Requirement

The LT3575 obtains output voltage information through

the transformer while the secondary winding is conducting

current. During this time, the output voltage (multiplied

times the turns ratio) is presented to the primary side of

the transformer. The LT3575 uses this reflected signal to

regulate the output voltage. This means that the LT3575

must turn on every so often to sample the output voltage,

which delivers a small amount of energy to the output.

This sampling places a minimum load requirement on the

output of 1% to 2% of the maximum load.

A Zener diode with a Zener breakdown of 20% higher

than the output voltage can serve as a minimum load if

pre-loading is not acceptable. For a 5V output, use a 6V

Zener with cathode connected to the output.

BIAS Pin Considerations

For applications with an input voltage less than 15V, the

BIAS pin is typically connected directly to the VIN pin. For

input voltages greater than 15V, it is preferred to leave the

BIAS pin separate from the VIN pin. In this condition, the

BIAS pin is regulated with an internal LDO to a voltage of

3V. By keeping the BIAS pin separate from the input voltage

at high input voltages, the physical size of the capacitors

can be minimized (the BIAS pin can then use a 6.3V or

10V rated capacitor).

Overdriving the BIAS Pin with a Third Winding

The LT3575 provides excellent output voltage regulation

without the need for an optocoupler, or third winding, but

for some applications with higher input voltages (>20V),

it may be desirable to add an additional winding (often

called a third winding) to improve the system efficiency.

For proper operation of the LT3575, if a winding is used as

a supply for the BIAS pin, ensure that the BIAS pin voltage

is at least 3.15V and always less than the input voltage.

For a typical 24VIN application, overdriving the BIAS pin

will improve the efficiency gain 4-5%.

Loop Compensation

The LT3575 is compensated using an external resistor-

capacitor network on the VC pin. Typical values are in

the range of RC = 50k and CC = 1.5nF (see the numerous

schematics in the Typical Applications section for other

possible values). If too large of an RC value is used, the part

will be more susceptible to high frequency noise and jitter. If

too small of an RC value is used, the transient performance

will suffer. The value choice for CC is somewhat the inverse

of the RC choice: if too small a CC value is used, the loop

may be unstable, and if too large a CC value is used, the

transient performance will also suffer. Transient response

plays an important role for any DC/DC converter.

Design Example

The following example illustrates the converter design

process using LT3575.

Given the input voltage of 20V to 28V, the required output

is 5V, 1A.

VIN(MIN) = 20V, VIN(MAX) = 28V, VOUT = 5V, VF = 0.5V

and IOUT = 1A

1. Select the transformer turns ratio to accommodate

the output.

The output voltage is reflected to the primary side by a

factor of turns ratio N. The switch voltage stress VSW is

expressed as:

N = NP

NS

VSW(MAX) = VIN + N(VOUT + VF ) < 50V

Or rearranged to:

N < 50 − VIN(MAX)

(VOUT + VF )

On the other hand, the primary side current is multiplied by

the same factor of N. The converter output capability is:

IOUT(MAX)

=

0.8

•

(1−

D)

•

1

2

NIPK

D = N(VOUT + VF )

VIN + N(VOUT + VF )

3575f

15

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