LMS12JC40 Просмотр технического описания (PDF) - LOGIC Devices
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LMS12JC40 Datasheet PDF : 9 Pages
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DEVICES INCORPORATED
LMS12
12-bit Cascadable Multiplier-Summer
TABLE 1. TIMING EXAMPLE FOR 5-TAP NONDECIMATING FIR FILTER
CLK Cycle
1
2
3
4
5
6
X(n)
Xn
Xn+1
Xn+2
Xn+3
Xn+4
Xn+5
A4 Register
Sum 4
Xn
Xn+1
Xn+2
Xn+3
Xn+4
h4Xn
h4Xn+1
h4Xn+2
h4Xn+3
A3 Register
Sum 3
Xn
Xn+1
Xn+2
Xn+3
Xn+4
h3Xn
h3Xn+1
h3Xn+2
h3Xn+3
+ h4Xn–1
+ h4Xn
+ h4Xn+1
+ h4Xn+2
A2 Register
Sum 2
Xn
Xn+1
Xn+2
Xn+3
Xn+4
h2Xn
h2Xn+1
h2Xn+2
h2Xn+3
+ h3Xn–1
+ h3Xn
+ h3Xn+1
+ h3Xn+2
+ h4Xn–2
+ h4Xn–1
+ h4Xn
+ h4Xn+1
A1 Register
Sum 1
Xn
Xn+1
Xn+2
Xn+3
Xn+4
h1Xn
h1Xn+1
h1Xn+2
h1Xn+3
+ h2Xn–1
+ h2Xn
+ h2Xn+1
+ h2Xn+2
+ h3Xn–2
+ h3Xn–1
+ h3Xn
+ h3Xn+1
+ h4Xn–3
+ h4Xn–2
+ h4Xn–1
+ h4Xn
A0 Register
Sum 0
Xn
Xn+1
Xn+2
Xn+3
Xn+4
h0Xn
h0Xn+1
h0Xn+2
h0Xn+3
+ h1Xn–1
+ h1Xn
+ h1Xn+1
+ h1Xn+2
+ h2Xn–2
+ h2Xn–1
+ h2Xn
+ h2Xn+1
+ h3Xn–3
+ h3Xn–2
+ h3Xn–1
+ h3Xn
+ h4Xn–4
+ h4Xn–3
+ h4Xn–2
+ h4Xn–1
7
Xn+6
Xn+5
h4Xn+4
Xn+5
h3Xn+4
+ h4Xn+3
Xn+5
h2Xn+4
+ h3Xn+3
+ h4Xn+2
Xn+5
h1Xn+4
+ h2Xn+3
+ h3Xn+2
+ h4Xn+1
Xn+5
h0Xn+4
+ h1Xn+3
+ h2Xn+2
+ h3Xn+1
+ h4Xn
8
Xn+7
Xn+6
h4Xn+5
Xn+6
h3Xn+5
+ h4Xn+4
Xn+6
h2Xn+5
+ h3Xn+4
+ h4Xn+3
Xn+6
h1Xn+5
+ h2Xn+4
+ h3Xn+3
+ h4Xn+2
Xn+6
h0Xn+5
+ h1Xn+4
+ h2Xn+3
+ h3Xn+2
+ h4Xn+1
9
Xn+8
Xn+7
h4Xn+6
Xn+7
h3Xn+6
+ h4Xn+5
Xn+7
h2Xn+6
+ h3Xn+5
+ h4Xn+4
Xn+7
h1Xn+6
+ h2Xn+5
+ h3Xn+4
+ h4Xn+3
Xn+7
h0Xn+6
+ h1Xn+5
+ h2Xn+4
+ h3Xn+3
+ h4Xn+2
FIGURE 2A. INPUT FORMATS
AIN
BIN
11 10 9
–20 2–1 2–2
(Sign)
Fractional Two’s Complement
210
2–9 2–10 2–11
11 10 9
–20 2–1 2–2
(Sign)
210
2–9 2–10 2–11
11 10 9
–211 210 29
(Sign)
Integer Two’s Complement
210
22 21 20
11 10 9
–211 210 29
(Sign)
210
22 21 20
FIGURE 2B. OUTPUT FORMATS
25 24
–23 22
(Sign)
25 24
–225 224
(Sign)
Fractional Two’s Complement
23 22 21
21 20 2–1
14 13 12
2–8 2–9 2–10
11 10 9
2–11 2–12 2–13
Integer Two’s Complement
23 22 21
223 222 221
14 13 12
214 213 212
11 10 9
211 210 29
210
2–20 2–21 2–22
210
22 21 20
Multiplier-Summers
3
08/16/2000–LDS.S12-J
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